Accounts controlled by Ciro Santilli Updated 2026-03-05
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Ciro Santilli controls the following accounts.
With non-trivial activity:
Trivial or no activity:
Profiles without URLs (OMG...):
  • Discord: username cirosantilli, previously cirosantilli#8921
Lost or deleted:
Accounts in Chinese websites. These accounts might be banned or altered or offer other limitations, so Ciro only communicates briefly through them. All communication through those channels should obviously be assumed to be compromised:
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Kaggle Updated 2026-01-30
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To be fair, this is one of the least worse ones.
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Yang-Mills existence and mass gap Updated 2025-07-16
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Video 1.
Yang-Mills 1 by David Metzler (2011)
Source.
A bit disappointing, too high level, with very few nuggests that are not Googleable withing 5 minutes.
Breakdown:
Video 2.
Millennium Prize Problem: Yang Mills Theory by David Gross (2018)
Source. 2 hour talk at the Kavli Institute for Theoretical Physics. Too mathematical, 2021 Ciro can't make much out of it.
Video 3.
Lorenzo Sadun on the "Yang-Mills and Mass Gap" Millennium problem
. Source. Unknown year. He almost gets there, he's good. Just needed to be a little bit deeper.
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Sponsor Ciro Santilli's work on OurBigBook.com / Taxation Updated 2026-01-30
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Ciro Santilli is a UK resident. He will register as a "solo trader" (slightly funny legal term) and treat donations that he uses for projects as grants, which pay regular income tax:
The rates are given at: www.gov.uk/income-tax-rates and are as of writing:
  • 0 - £12,570 0%
  • £12,571 - £50,270: 20%
  • £50,271 - to £125,140: 40%
  • £125,140: 45%
National insurance is also likely going to be paid: www.gov.uk/self-employed-national-insurance-rates:
  • 6% on profits between £12,570 and £50,270
  • 2% on profits over £50,270
Fortunately however VAT does not need to be paid.
The amount that will be declared is the same as he grant amount that was requested, e.g. if 100k USD is requested for 1 year, then 100k USD will be pro-rata declared on that year.
Any remaining donations that don't yet meet specific grant goals will be initially treated as cash gifts which pay no tax. If in the future they are used as grant money after further goal amounts are reached, then they will taxed as grants.
Note however that if the donor is UK-based and dies within 7 years of the gift being given, inheritance tax has to be paid on them as per: www.gov.uk/inheritance-tax/gifts, at a maximum of 32% and going to to 0% at 7 years, so let me know from the afterlife.
Ciro paid his bill for £24,321.87 ($32,729.70) on 2026-01-02. Announcements:
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Xah Lee Updated 2025-07-16
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fuseki.net/home/List-of-Patreon-Subs-with-Justification.html describes him well:
Outsider, formerly homeless, extreme person interested in CS and culture. Self-publishes a website with thousands of tutorial / opinion pages. Possibly similar to Sam Sloan - extremely productive, wide interests, obsessive, and pretty disagreeable.
Homepage xahlee.org/ says:
Siphon my knowledge into your brain. Assimilate my sensibilities to your spine.
Nice Second brain vibe.
Figure 1.
Xah Lee with some weird statuettes of himself
. Source. 2019.
Let's see:
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x86 Paging Tutorial / Multiple addresses translate to a single physical address Updated 2025-07-16
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The same linear address can translate to different physical addresses for different processes, depending only on the value inside cr3.
Both linear addresses 00002 000 from process 1 and 00004 000 from process 2 point to the same physical address 00003 000. This is completely allowed by the hardware, and it is up to the operating system to handle such cases.
This often in normal operation because of Copy-on-write (COW), which be explained elsewhere.
Such mappings are sometime called "aliases".
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x86 Paging Tutorial / Linux kernel usage Updated 2025-07-16
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The Linux kernel makes extensive usage of the paging features of x86 to allow fast process switches with small data fragmentation.
There are also however some features that the Linux kernel might not use, either because they are only for backwards compatibility, or because the Linux devs didn't feel it was worth it yet.
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x86 Paging Tutorial / How the K-ary tree is used in x86 Updated 2025-07-16
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x86's multi-level paging scheme uses a 2 level K-ary tree with 2^10 bits on each level.
Addresses are now split as:
| directory (10 bits) | table (10 bits) | offset (12 bits) |
Then:
  • the top 10 bits are used to walk the top level of the K-ary tree (level0)
    The top table is called a "directory of page tables".
    cr3 now points to the location on RAM of the page directory of the current process instead of page tables.
    Page directory entries are very similar to page table entries except that they point to the physical addresses of page tables instead of physical addresses of pages.
    Each directory entry also takes up 4 bytes, just like page entries, so that makes 4 KiB per process minimum.
    Page directory entries also contain a valid flag: if invalid, the OS does not allocate a page table for that entry, and saves memory.
    Each process has one and only one page directory associated to it (and pointed to by cr3), so it will contain at least 2^10 = 1K page directory entries, much better than the minimum 1M entries required on a single-level scheme.
  • the next 10 bits are used to walk the second level of the K-ary tree (level1)
    Second level entries are also called page tables like the single level scheme.
    Page tables are only allocated only as needed by the OS.
    Each page table has only 2^10 = 1K page table entries instead of 2^20 for the single paging scheme.
    Each process can now have up to 2^10 page tables instead of 2^20 for the single paging scheme.
  • the offset is again not used for translation, it only gives the offset within a page
One reason for using 10 bits on the first two levels (and not, say, 12 | 8 | 12 ) is that each Page Table entry is 4 bytes long. Then the 2^10 entries of Page directories and Page Tables will fit nicely into 4Kb pages. This means that it faster and simpler to allocate and deallocate pages for that purpose.
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x86 Paging Tutorial / CAM Updated 2025-07-16
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Using the TLB makes translation faster, because the initial translation takes one access per TLB level, which means 2 on a simple 32 bit scheme, but 3 or 4 on 64 bit architectures.
The TLB is usually implemented as an expensive type of RAM called content-addressable memory (CAM). CAM implements an associative map on hardware, that is, a structure that given a key (linear address), retrieves a value.
Mappings could also be implemented on RAM addresses, but CAM mappings may required much less entries than a RAM mapping.
For example, a map in which:
  • both keys and values have 20 bits (the case of a simple paging schemes)
  • at most 4 values need to be stored at each time
could be stored in a TLB with 4 entries:
linear  physical
------  --------
00000   00001
00001   00010
00010   00011
FFFFF   00000
However, to implement this with RAM, it would be necessary to have 2^20 addresses:
linear  physical
------  --------
00000   00001
00001   00010
00010   00011
... (from 00011 to FFFFE)
FFFFF   00000
which would be even more expensive than using a TLB.
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Fermat's last theorem Updated 2026-01-30
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A generalization of the Pythagorean triple infinity question.
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Google custom hardware Updated 2026-01-30
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Erdős number Updated 2025-10-27
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Discrete logarithm Updated 2025-10-27
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An important case is the discrete logarithm of the cyclic group in which the group is a cyclic group.
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x86 Paging Tutorial / 64-bit architectures Updated 2025-07-16
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64 bits is still too much address for current RAM sizes, so most architectures will use less bits.
x86_64 uses 48 bits (256 TiB), and legacy mode's PAE already allows 52-bit addresses (4 PiB). 56-bits is a likely future candidate.
12 of those 48 bits are already reserved for the offset, which leaves 36 bits.
If a 2 level approach is taken, the best split would be two 18 bit levels.
But that would mean that the page directory would have 2^18 = 256K entries, which would take too much RAM: close to a single-level paging for 32 bit architectures!
Therefore, 64 bit architectures create even further page levels, commonly 3 or 4.
x86_64 uses 4 levels in a 9 | 9 | 9 | 9 scheme, so that the upper level only takes up only 2^9 higher level entries.
The 48 bits are split equally into two disjoint parts:
----------------- FFFFFFFF FFFFFFFF
Top half
----------------- FFFF8000 00000000


Not addressable


----------------- 00007FFF FFFFFFFF
Bottom half
----------------- 00000000 00000000
A 5-level scheme is emerging in 2016: software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf which allows 52-bit addresses with 4k pagetables.
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x86 Paging Tutorial Updated 2025-07-19
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This tutorial explains the very basics of how paging works, with focus on x86, although most high level concepts will also apply to other instruction set architectures, e.g. ARM.
The goals are to:
  • demonstrate minimal concrete simplified paging examples that will be useful to those learning paging for the first time
  • explain the motivation behind paging
This tutorial was extracted and expanded from this Stack Overflow answer.
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x86 custom instructions Updated 2025-07-16
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Intel is known to have created customized chips for very large clients.
This is mentioned e.g. at: www.theregister.com/2021/03/23/google_to_build_server_socs/
Intel is known to do custom-ish cuts of Xeons for big customers.
Those chips are then used only in large scale server deployments of those very large clients. Google is one of them most likely, given their penchant for Google custom hardware.
TODO better sources.
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Why can't you collimate incoherent light as well as a laser? Updated 2025-07-16
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You could put an LED in a cavity with a thin long hole but then, most rays, which are not aligned with the hole, will just bounce inside forever producing heat.
So you would have a very hot device, and very little efficiency on the light output. This heat might also behave like a black-body radiation source, so you would not have a single frequency.
The beauty of lasers is the laser cavity (two parallel mirrors around the medium) selects parallel motion preferentially, see e.g.: youtu.be/_JOchLyNO_w?t=832 from Video "How Lasers Work by Scientized (2017)"
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Whole cell simulation Updated 2025-07-16
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Ciro Santilli started taking some notes at: github.com/cirosantilli/awesome-whole-cell-simulation. but they are going to be all migrated here.
It is interesting to note how one talks about single cell analysis, in contrast to whole cell simulation: experimentally it is hard to analyse a single cell. But theoretically, it is hard to simulate a single cell. This mismatch is perhaps the ultimate frontier of molecular biology.
Video 1.
A Computational Whole-Cell Model Predicts Genotype From Phenotype by Markus Covert (2013)
Source.
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Who are the developers that are making the most money through GitHub sponsors? Updated 2025-07-16
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Calculus of variations Updated 2025-07-16
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Calculus of variations is the field that searches for maxima and minima of Functionals, rather than the more elementary case of functions from to .
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