Ciro Santilli @cirosantilli 35

merlijn.sebrechts.be/blog/2020-08-02-why-one-snap-store/ has some very good comments on how snap is more closed than Flatpak.

Snap's permission system is extremely annoying, notably restricting access to home files. They need a popup that says "permission required by app, accept?" urgently!!!

twitter.com/cryptograffiti (marked as joined March 2014)

Bitcoin blockchain image indexer and uploader. Uses fake P2PKH address.

At some point it stopped using Bitcoin mainline and moved to Bitcoin Cash instead: www.newsbtc.com/news/bitcoin/cryptograffiti-rejects-bitcoin-core-bch-now-available-payment-method/ and therefore became useless. Existing indexes seem to have been broken as well.

Also, based on the timing of Figure "Erich Erstu", this service may be responsible for a large part of the raw JPEG images present in the blockchain from block 416527 (2016) onwards. This is also suggested by the comments at Figure "Tank Man".

A Quantitative Analysis of the Impact of Arbitrary Blockchain Content on Bitcoin gives the interesting insight that all its transactions seem to return change/fees to one or two given addresses, thus making it very easy to list all their uploads if they were consistent! So all we need are some starting points, which we have mostly due to ASCII mentions of the site on known inscriptions, all of which have a few common spent addresses at the very end:so we just have to solve get all Bitcoin transactions from and to a given address and we are done. Blockchair shows about 800 entries as of February 2024, between 4f94f97eb156b8563a213bb292314a0bd9c95b39afc521fc5965d050daab2a78 (2014-03-02) and ac5f4ea03597b43a72fb8ab42bd5384629f87f4f4abc534f38b8c15148ccaf9f (2017-10-12): blockchair.com/bitcoin/outputs?s=time(desc)&q=recipient(1MVpQJA7FtcDrwKC6zATkZvZcxqma4JixS)

Other related transactions:

TODO understand what these are:

math.stackexchange.com/questions/700235/is-there-an-easy-proof-for-the-classification-of-6-transitive-finite-groups says there aren't any non-boring ones.

God, it's impossible! You just have to convert the entire fucking call stack all the way up to async functions. It could mean refactoring hundreds of functions.

To be fair, there is a logic to this, if you put yourself within the crappiness of the JavaScript threading model. And Python is not that much better with its Global Interpreter Lock.

The problem is that async was introduced relatively late, previously we just had to use infinitely deep callback trees, which was worse:compared to the new infinitely more readable:But now we are in an endless period of transition between both worlds.

It is also worth mentioning that callbacks are still inescapable if you really want to fan out into a non-linear dependency graph, usually with Promise.all:

Bibliography:

And then, after many many hours of this work, you might notice that the new code is way, way way slower than before, because making small functions async has a large performance impact: madelinemiller.dev/blog/javascript-promise-overhead/. Real world case with a 4x slowdown: github.com/ourbigbook/ourbigbook/tree/async-slow.

Anyways, since you Googled here, you might as well learn the standard pattern to convert callbacks functions into async functions using a promise: stackoverflow.com/questions/4708787/get-password-from-input-using-node-js/71868483#71868483

Page contains a good summary of their hardware to date. They seem to still be the centerpiece of silicon development. There are still however people outside of Israel doing it, e.g.: www.linkedin.com/in/laurasharpless/ says as of 2021:

2021: networking chip reports emerge: www.theverge.com/circuitbreaker/2021/3/30/22358633/amazon-reportedly-custom-network-switch-silicon-aws, presumably contesting with the likes of Cisco?

2018 onwards: Amazon AI accelerator silicon.

Although it is impossible to understand without examples in mind, try to get familiar with the manuals as soon as possible.

Intel describes paging in the Intel Manual Volume 3 System Programming Guide - 325384-056US September 2015 Chapter 4 "Paging".

Specially interesting is Figure 4-4 "Formats of CR3 and Paging-Structure Entries with 32-Bit Paging", which gives the key data structures.

The Translation Lookahead Buffer (TLB) is a cache for paging addresses.

Since it is a cache, it shares many of the design issues of the CPU cache, such as associativity level.

This section shall describe a simplified fully associative TLB with 4 single address entries. Note that like other caches, real TLBs are not usually fully associative.

Free:

Non-free:

It is good to see that top-universities is still keeping up with it's main purpose: spontaneous eugenics:

2D representation of $SU(2)$.