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Amplifier clipping occurs when an electronic amplifier cannot follow the output amplitude predicted by its small-signal voltage gain. Its finite amplifier output range truncates the waveform. For a deliberately simple, instantaneous model with positive gain $G$ and fixed lower and upper output limits,Here $v_i$ and $v_o$ are input and output electric potential differences. The flat portions express a nonlinearity: doubling an already excessive input need not change the output. Real output limits depend on the supply, load and output stage. They need not equal the supply rails. Texas Instruments' example integrating amplifier uses separate supply and output-range design goals and explains how unrestricted DC integration eventually reaches saturation.^[ref]

Amplifier clipping can corrupt an area measurement even when the waveform still looks easy to integrate. Suppose $G=10$, $V_{\mathrm{lo}}=-2\mathrm{V}$, $V_{\mathrm{hi}}=2\mathrm{V}$, and a rectangular input is $0.4\mathrm{V}$ for $1\mathrm{ms}$ and zero otherwise. Its true area is $0.4\mathrm{V}\mathrm{ms}$, but the ideal unclipped output of $4\mathrm{V}$ is reduced to $2\mathrm{V}$. Dividing the clipped waveform area by the gain gives50% below the true input area. Any rectangular input at or above $0.2\mathrm{V}$ with the same duration produces this same clipped plateau in the stipulated model. Subsequent integration cannot recover which of those input amplitudes was present.

A useful bench experiment feeds a repeatable pulse into an electronic amplifier and records both input and output on an oscilloscope. Increase the input amplitude while holding the gain, pulse duration and load fixed. The output first scales with the input, then ceases to do so near its limits. Reducing the gain tests whether an apparent input plateau is actually a receiver limit. Comparing measured areas before and after that change reveals the clipped waveform area bias directly.

The instantaneous clipping formula does not describe the internal dynamics of a saturated integrating amplifier. Once its feedback assumptions fail, recovery can take additional time. The ACF2101's historical datasheet explicitly distinguishes output overload from ordinary reset and describes extra recovery delay; the relevant behavior must be characterized for the actual circuit.^[ref] An integrator reset establishes a new starting state, while a suitable input range prevents information being lost before that reset.

The amplifier input common-mode range is the set of common-mode voltages for which an electronic amplifier meets its operating requirements at the specified differential input, gain, supplies and load. A high common-mode rejection ratio describes rejection within a usable operating region; it does not extend that region. An instrumentation amplifier can have saturated internal stages even when its ideal final output fits the amplifier output range.^[ref]

An original simplified three-amplifier model makes the constraint visible. Let the input-stage output potentials bewhere $v_c=(v_{+}+v_{-})/2$ and $v_d=v_{+}-v_{-}$. Suppose each internal output must stay between $0.4$ and $4.6\mathrm{V}$. ThenFor $G_1=20$ and $v_d=0.10\mathrm{V}$, the permitted common interval is $1.4$–$3.6\mathrm{V}$. Choosing $v_c=0.8\mathrm{V}$ predicts internal outputs $1.8$ and $-0.2\mathrm{V}$ and violates the stipulated limit. A unity-gain difference stage with reference $2.5\mathrm{V}$ would nevertheless predict a plausible final $4.5\mathrm{V}$. That final prediction alone is insufficient.

This is an illustrative architecture model, not a device specification; input-device limits can impose further restrictions. A practical test holds $v_d$ fixed while sweeping both inputs together, recording differential gain error and distortion. Repeat at the intended gain and differential amplitudes. The resulting operating region is more informative than a single common-mode interval quoted without its test conditions.

Amplifier output headroom is the electric potential difference reserved between a usable output limit and its corresponding supply rail. If the supply potentials are $V_{-},V_{+}$ and the specified amplifier output range is $[V_{\mathrm{lo}},V_{\mathrm{hi}}]$, defineThese two margins can differ and depend on load and operating conditions. The switched-integrator datasheet lists supply conditions, output range and output-current limits separately.^[ref]

For an original chosen $0$–$5\mathrm{V}$ circuit with usable limits $0.25$ and $4.55\mathrm{V}$, the lower and upper margins are $0.25$ and $0.45\mathrm{V}$. A signal centered at $V_0$ has maximum symmetric peak excursionAt $V_0=2.50\mathrm{V}$ this is $2.05\mathrm{V}$. Centering instead at $(V_{\mathrm{lo}}+V_{\mathrm{hi}})/2=2.40\mathrm{V}$ permits $2.15\mathrm{V}$. Thus centering on the supply midpoint need not maximize the usable symmetric swing.

An output sweep into the actual load identifies where the specified gain or distortion tolerance fails. Changing the load tests whether the limit comes from output-current demand. These measurements concern static headroom; a fast pulse also tests frequency response and overload recovery. More final-stage headroom does not cure an internal violation of the amplifier input common-mode range.

Electronic gain expresses how an electronic circuit scales a specified input signal quantity into an output quantity. For a linearized voltage amplifier around its operating point, the voltage gain is $A_v=\delta v_{\mathrm{out}}/\delta v_{\mathrm{in}}$. At a sinusoidal frequency it can be a complex phasor ratio, specifying both amplitude ratio and phase shift. Power gain instead compares the average power delivered to the load with the average signal power entering the amplifier:State the input/output quantities, frequency, load and operating conditions when specifying gain. A transimpedance amplifier relates output electric potential difference to input current and has a dimensional transfer ratio in ohms.

For an original circuit example, use an inverting operational amplifier with input resistor $R_1=10\mathrm{k\Omega }$, feedback resistor $R_2=100\mathrm{k\Omega }$ and load $R_L=1\mathrm{k\Omega }$. In its ideal negative-feedback linear regime,An input of $50\mathrm{mV}$ root mean square therefore gives $0.50\mathrm{V}$ root mean square at the output, with a phase inversion. The manufacturer's primary explanation derives this resistance-ratio gain using the input and feedback currents.^[ref] Suitable supplies, output-current capability and amplifier output range are assumptions of this worked model, not specifications of a particular device.

Here the input resistance is $R_1$ in the ideal model. For resistive ports and root-mean-square signal amplitudes,The example input power is $0.25\mu \mathrm{W}$ and load power $0.25\mathrm{mW}$, giving $G_P=1000$. The additional output energy comes from the amplifier's supply, controlled by the input signal. The impedance condition for converting voltage gain to power gain is essential: voltage magnitude alone does not specify load power.

Voltage gain is conventionally expressed as $20{\log }_{10}|A_v|$ decibels, while power gain uses $10{\log }_{10}{G}_P$. This example has voltage gain $20\mathrm{dB}$ and power gain $30\mathrm{dB}$; the two expressions agree when the resistive input and load impedances are equal. A negative voltage gain indicates phase inversion; its magnitude enters the logarithm.

A direct test drives a small sine wave into the input and measures the actual terminal signals with an oscilloscope. Sweeping frequency reveals the frequency response; increasing amplitude reveals amplifier clipping or other departure from the assumed linear gain. Keep the load and measurement impedances specified. Gain can amplify input noise along with signal, so the signal-to-noise ratio requires its own measurement.

An instrumentation amplifier amplifies a differential input while presenting high input impedance and rejecting a common component. A useful ideal relation isIts common-mode rejection ratio describes finite unwanted response to common-mode voltage. This is distinct from the amplifier input common-mode range over which the circuit can operate without internal saturation.^[ref]

For an original example, stipulate $v_{+}=2.501\mathrm{V}$, $v_{-}=2.499\mathrm{V}$, $G=100$ and $V_{\mathrm{ref}}=2.5\mathrm{V}$. The differential signal is $2\mathrm{mV}$ and the ideal output is $2.7\mathrm{V}$, assuming all input and output limits are satisfied.

Now suppose the differential-to-common gain ratio is $10^4$, or $80\mathrm{dB}$. The common-mode gain is then $100/10^4=0.01$. A $1\mathrm{V}$ common-input change contributes $10\mathrm{mV}$ at the output, five percent of the desired $0.20\mathrm{V}$ signal contribution. A high rejection ratio therefore does not mean zero error.

A source that changes both inputs together tests rejection; a source that changes their difference tests differential gain. Both tests must respect input common-mode limits, amplifier output range, load and frequency response. A plausible ideal output value alone does not prove that every internal stage remains linear.

Loaded voltage gain is the ratio of an amplifier's output to input signal electric potential differences with a specified load connected. In a small-signal model, let the open-circuit output be $v_{\mathrm{oc}}=A_0{v}_{\mathrm{in}}$ and let the complete amplifier have output impedance $Z_o$. A load $Z_L$ then givesThis is the voltage divider result from Thévenin's theorem at the output terminals. The university source explains why a linear circuit can be replaced at specified terminals by a source and series impedance.^[ref] The output impedance used here must describe the complete amplifier at the stated operating point and frequency, including its feedback.

The input terminal matters too. For a generator $v_s$ with source impedance $Z_s$ driving amplifier input impedance $Z_i$, the corresponding source-to-load ratio in a unilateral model isThis includes both input and output loading; it differs from the terminal-to-terminal voltage gain defined above.

For an original resistive example, choose $A_0=12$, $Z_o=100\Omega$, $Z_L=900\Omega$, $Z_i=1\mathrm{k\Omega }$ and $Z_s=50\Omega$. The loaded terminal gain is $10.8$, while the source-to-load gain is $72/7\approx 10.286$. Reducing the load to $100\Omega$ makes the terminal gain six, even though the stipulated open-circuit gain remains twelve. These are model parameters, not device specifications.

A direct test holds the actual amplifier input signal fixed, changes a known load and measures the output with an oscilloscope whose probe impedance is included in the effective load. Use small enough signals to retain linear operation and respect the amplifier output range. If the output-to-input ratio changes with loading, an unloaded gain alone is insufficient to predict the circuit's behavior.

At nonzero frequency the impedances and gain can be complex. A reactive-load phase shift in a finite-output-impedance amplifier can change both magnitude and phase, while input-output coupling or nonlinear current limiting can invalidate this simple unilateral divider model. The ideal feedback resistance-ratio examples in the manufacturer's introduction apply within their corresponding operating assumptions.^[ref]