Electronic amplifier

Electronic gain expresses how an electronic circuit scales a specified input signal quantity into an output quantity. For a linearized voltage amplifier around its operating point, the voltage gain is

A_{v} = δ v_{out} / δ v_{in}

. At a sinusoidal frequency it can be a complex phasor ratio, specifying both amplitude ratio and phase shift. Power gain instead compares the average power delivered to the load with the average signal power entering the amplifier:

G_{P} = \frac{P _{load}}{P _{in}} .

State the input/output quantities, frequency, load and operating conditions when specifying gain. A transimpedance amplifier relates output electric potential difference to input current and has a dimensional transfer ratio in ohms.

For an original circuit example, use an inverting operational amplifier with input resistor

R_{1} = 10 kΩ

, feedback resistor

R_{2} = 100 kΩ

and load

R_{L} = 1 kΩ

. In its ideal negative-feedback linear regime,

A_{v} = - \frac{R _{2}}{R _{1}} = - 10.

An input of

50 mV

root mean square therefore gives

0.50 V

root mean square at the output, with a phase inversion. The manufacturer's primary explanation derives this resistance-ratio gain using the input and feedback currents.^[ref] Suitable supplies, output-current capability and amplifier output range are assumptions of this worked model, not specifications of a particular device.

Here the input resistance is

R_{1}

in the ideal model. For resistive ports and root-mean-square signal amplitudes,

G_{P} = ∣ A_{v} ∣^{2} \frac{R _{in}}{R _{L}} .

The example input power is

0.25 μ W

and load power

0.25 mW

, giving

G_{P} = 1000

. The additional output energy comes from the amplifier's supply, controlled by the input signal. The impedance condition for converting voltage gain to power gain is essential: voltage magnitude alone does not specify load power.

Voltage gain is conventionally expressed as

20 lo g_{10} ∣ A_{v} ∣

decibels, while power gain uses

10 lo g_{10} G_{P}

. This example has voltage gain

20 dB

and power gain

30 dB

; the two expressions agree when the resistive input and load impedances are equal. A negative voltage gain indicates phase inversion; its magnitude enters the logarithm.

A direct test drives a small sine wave into the input and measures the actual terminal signals with an oscilloscope. Sweeping frequency reveals the frequency response; increasing amplitude reveals amplifier clipping or other departure from the assumed linear gain. Keep the load and measurement impedances specified. Gain can amplify input noise along with signal, so the signal-to-noise ratio requires its own measurement.

Impedance condition for converting voltage gain to power gain

A voltage gain determines a power gain only when the electrical conditions at both ports are included. The familiar equality between

20 lo g_{10} ∣ A_{v} ∣

and

10 lo g_{10} G_{P}

requires a particular impedance relation; it is not a conversion between arbitrary voltage and power ratios.

Use phasors whose moduli are root mean square amplitudes, at one sinusoidal frequency. At a load with electrical impedance

Z

and electrical admittance

Y = 1/ Z

, the current is

I = YV

. Its complex electrical power is

V I^{*}

, with the complex conjugate arising from the relative phase of the two sinusoids. Averaging

v (t) i (t)

over a cycle gives the active power

P = Re (V I^{*}) = ∣ V ∣^{2} Re Y .

To see the averaging step, write

v (t) = 2 ∣ V ∣ cos (ω t + ϕ_{V})

and similarly for

i (t)

. The product's cycle average is

∣ V ∣∣ I ∣ cos (ϕ_{V} - ϕ_{I})

, the real part of

V I^{*}

. Peak-amplitude phasors instead require an extra factor

1/2

Let

Y_{in}

describe the actual input impedance and

Y_{L}

the actual load impedance. Take

Re Y_{in} > 0

and

Re Y_{L} > 0

with nonzero terminal signals, and define currents into the amplifier at the input and into the load at the output. With the measured loaded voltage gain

A_{v} = V_{L} / V_{in}

G_{P} = \frac{P _{L}}{P _{in}} = ∣ A_{v} ∣^{2} \frac{Re Y _{L}}{Re Y _{in}} .

Thus

G_{P} = ∣ A_{v} ∣^{2}

requires equality of the relevant electrical conductances, not merely equality of impedance moduli. For example, input

Z_{in} = 50 Ω

and load

Z_{L} = (30 + 40 i) Ω

both have modulus

50 Ω

, but their electrical admittances have real parts

0.020

and

0.012 S

. The multiplier is

0.6

, so

G_{P} = 0.6∣ A_{v} ∣^{2}

For real resistive ports this becomes

G_{P} = ∣ A_{v} ∣^{2} \frac{R _{in}}{R _{L}}, 10 lo g_{10} G_{P} = 20 lo g_{10} ∣ A_{v} ∣ + 10 lo g_{10} \frac{R _{in}}{R _{L}} .

Take an original example with measured

∣ A_{v} ∣ = 0.5

R_{in} = 10 kΩ

and

R_{L} = 50 Ω

. The voltage gain is

- 6.02 dB

, while the power gain is

50

, or

16.99 dB

. An active buffer can reduce the signal's electric potential difference while delivering more signal power than it accepts at its input; the supply provides the additional energy.

The amplifier's output impedance is distinct from the connected load impedance. To show why that distinction matters, model its output by a Thévenin equivalent with open-circuit voltage

A_{0} V_{in}

and series resistance

R_{o}

. The voltage divider gives

A_{v} = A_{0} \frac{R _{L}}{R _{o} + R _{L}}, G_{P} = ∣ A_{0} ∣^{2} R_{in} \frac{R _{L}}{( R _{o} + R _{L} ) ^{2}} .

With

A_{0} = 0.6

and

R_{o} = 10 Ω

, the

50 Ω

load produces the preceding

A_{v} = 0.5

example. Differentiating

R_{L} / (R_{o} + R_{L})^{2}

gives

(R_{o} - R_{L}) / (R_{o} + R_{L})^{3}

, so delivered power is largest at

R_{L} = R_{o}

, as in the maximum power transfer theorem. Here its power gain is

90

. Increasing

R_{L}

much further makes

A_{v}

approach

A_{0}

but reduces delivered power. That high-load-impedance regime is impedance bridging, useful for sensing the source's voltage with little loading.

Figure 1.
Voltage transfer and delivered power respond differently to the same load resistance
. Original Thévenin amplifier model with open-circuit voltage gain 0.6, output resistance 10 ohms and input resistance 10 kilohms. The measured voltage gain increases toward 0.6 as the load grows; power gain peaks at a 10-ohm load. The marked 50-ohm point has voltage gain 0.5 and power gain 50. **Details**.

A bench demonstration uses a function generator, a known termination and an oscilloscope. The Keysight guide explains that an expected-load setting changes how amplitude is displayed for generators with a fixed series output impedance; a high-impedance load can receive twice the voltage expected for a matched

50 Ω

termination.^[ref] As an independent low-frequency resistive calculation, an open-circuit source of

1 V

root mean square with

50 Ω

series resistance delivers

0.5 V

and

5 mW

50 Ω

. Into

1 MΩ

it delivers about

0.99995 V

but only

1.00 μ W

. The larger terminal reading accompanies much less delivered power. Specify the actual load, frequency and amplitude convention when comparing gain measurements.

Instrumentation amplifier ( $v_{o} = V_{ref} + G (v_{+} - v_{-})$ )

An instrumentation amplifier amplifies a differential input while presenting high input impedance and rejecting a common component. A useful ideal relation is

v_{o} = V_{ref} + G (v_{+} - v_{-}) .

Its common-mode rejection ratio describes finite unwanted response to common-mode voltage. This is distinct from the amplifier input common-mode range over which the circuit can operate without internal saturation.^[ref]

For an original example, stipulate

v_{+} = 2.501 V

v_{-} = 2.499 V

G = 100

and

V_{ref} = 2.5 V

. The differential signal is

2 mV

and the ideal output is

2.7 V

, assuming all input and output limits are satisfied.

Now suppose the differential-to-common gain ratio is

1 0^{4}

, or

80 dB

. The common-mode gain is then

100/1 0^{4} = 0.01

. A

1 V

common-input change contributes

10 mV

at the output, five percent of the desired

0.20 V

signal contribution. A high rejection ratio therefore does not mean zero error.

A source that changes both inputs together tests rejection; a source that changes their difference tests differential gain. Both tests must respect input common-mode limits, amplifier output range, load and frequency response. A plausible ideal output value alone does not prove that every internal stage remains linear.

Amplifier input common-mode range

The amplifier input common-mode range is the set of common-mode voltages for which an electronic amplifier meets its operating requirements at the specified differential input, gain, supplies and load. A high common-mode rejection ratio describes rejection within a usable operating region; it does not extend that region. An instrumentation amplifier can have saturated internal stages even when its ideal final output fits the amplifier output range.^[ref]

An original simplified three-amplifier model makes the constraint visible. Let the input-stage output potentials be

u_{1} = v_{c} + \frac{G _{1} v _{d}}{2}, u_{2} = v_{c} - \frac{G _{1} v _{d}}{2},

where

v_{c} = (v_{+} + v_{-}) /2

and

v_{d} = v_{+} - v_{-}

. Suppose each internal output must stay between

0.4

and

4.6 V

. Then

0.4 V + \frac{∣ G _{1} v _{d} ∣}{2} \leq v_{c} \leq 4.6 V - \frac{∣ G _{1} v _{d} ∣}{2} .

For

G_{1} = 20

and

v_{d} = 0.10 V

, the permitted common interval is

1.4

–

3.6 V

. Choosing

v_{c} = 0.8 V

predicts internal outputs

1.8

and

- 0.2 V

and violates the stipulated limit. A unity-gain difference stage with reference

2.5 V

would nevertheless predict a plausible final

4.5 V

. That final prediction alone is insufficient.

This is an illustrative architecture model, not a device specification; input-device limits can impose further restrictions. A practical test holds

v_{d}

fixed while sweeping both inputs together, recording differential gain error and distortion. Repeat at the intended gain and differential amplitudes. The resulting operating region is more informative than a single common-mode interval quoted without its test conditions.

Amplifier output range ( $V_{lo} \leq v_{o} \leq V_{hi}$ )

The amplifier output range is the interval over which an electronic amplifier can provide the specified output behavior under stated supply, load and operating conditions. Its limits need not coincide with the power-supply potentials. The historical integrator datasheet lists output range and output-current conditions separately from its supply conditions.^[ref]

For an original linear model, let

v_{o} = V_{ref} + G v_{i}

with positive gain. Avoiding static clipping requires

\frac{V _{lo} - V _{ref}}{G} \leq v_{i} \leq \frac{V _{hi} - V _{ref}}{G} .

Stipulate a

0

–

5 V

supply, usable output limits

0.2

–

4.6 V

V_{ref} = 2.0 V

and

G = 200

. The permitted differential input interval is

- 9

13 mV

. A positive

12 mV

input predicts

4.4 V

and fits; a negative

12 mV

input predicts

- 0.4 V

and does not.

These are stipulated limits, not a product guarantee. The amplifier output headroom relative to each supply can differ. Loading can change the available output swing, and input-stage saturation can occur even when the final ideal output lies inside its range. A slow input sweep identifies the static departure from linear gain; a pulse test additionally probes dynamic recovery. Amplifier clipping describes the waveform consequence of exceeding these limits.

Amplifier output headroom

Amplifier output headroom is the electric potential difference reserved between a usable output limit and its corresponding supply rail. If the supply potentials are

V_{-}, V_{+}

and the specified amplifier output range is

[V_{lo}, V_{hi}]

, define

h_{-} = V_{lo} - V_{-}, h_{+} = V_{+} - V_{hi} .

These two margins can differ and depend on load and operating conditions. The switched-integrator datasheet lists supply conditions, output range and output-current limits separately.^[ref]

For an original chosen

0

–

5 V

circuit with usable limits

0.25

and

4.55 V

, the lower and upper margins are

0.25

and

0.45 V

. A signal centered at

V_{0}

has maximum symmetric peak excursion

A_{m a x} = min (V_{0} - V_{lo}, V_{hi} - V_{0}) .

V_{0} = 2.50 V

this is

2.05 V

. Centering instead at

(V_{lo} + V_{hi}) /2 = 2.40 V

permits

2.15 V

. Thus centering on the supply midpoint need not maximize the usable symmetric swing.

An output sweep into the actual load identifies where the specified gain or distortion tolerance fails. Changing the load tests whether the limit comes from output-current demand. These measurements concern static headroom; a fast pulse also tests frequency response and overload recovery. More final-stage headroom does not cure an internal violation of the amplifier input common-mode range.

Amplifier clipping

Amplifier clipping occurs when an electronic amplifier cannot follow the output amplitude predicted by its small-signal voltage gain. Its finite amplifier output range truncates the waveform. For a deliberately simple, instantaneous model with positive gain

G

and fixed lower and upper output limits,

v_{o} (t) = clip (G v_{i} (t)) = min (V_{hi}, max (V_{lo}, G v_{i} (t))) .

Here

v_{i}

and

v_{o}

are input and output electric potential differences. The flat portions express a nonlinearity: doubling an already excessive input need not change the output. Real output limits depend on the supply, load and output stage. They need not equal the supply rails. Texas Instruments' example integrating amplifier uses separate supply and output-range design goals and explains how unrestricted DC integration eventually reaches saturation.^[ref]

Amplifier clipping can corrupt an area measurement even when the waveform still looks easy to integrate. Suppose

G = 10

V_{lo} = - 2 V

V_{hi} = 2 V

, and a rectangular input is

0.4 V

for

1 ms

and zero otherwise. Its true area is

0.4 V ms

, but the ideal unclipped output of

4 V

is reduced to

2 V

. Dividing the clipped waveform area by the gain gives

A_{i} = \frac{1}{G} \int v_{o} (t) d t = 0.2 V ms,

50% below the true input area. Any rectangular input at or above

0.2 V

with the same duration produces this same clipped plateau in the stipulated model. Subsequent integration cannot recover which of those input amplitudes was present.

A useful bench experiment feeds a repeatable pulse into an electronic amplifier and records both input and output on an oscilloscope. Increase the input amplitude while holding the gain, pulse duration and load fixed. The output first scales with the input, then ceases to do so near its limits. Reducing the gain tests whether an apparent input plateau is actually a receiver limit. Comparing measured areas before and after that change reveals the clipped waveform area bias directly.

The instantaneous clipping formula does not describe the internal dynamics of a saturated integrating amplifier. Once its feedback assumptions fail, recovery can take additional time. The ACF2101's historical datasheet explicitly distinguishes output overload from ordinary reset and describes extra recovery delay; the relevant behavior must be characterized for the actual circuit.^[ref] An integrator reset establishes a new starting state, while a suitable input range prevents information being lost before that reset.

Figure 1.
Ideal pulse clipping loses area, while a finite reset leaves an exponentially decreasing residual; the separate dashed level illustrates a stipulated charge-injection pedestal.
**Details**.

Clipped waveform area ( $\int clip (G v_{i}) d t$ )

A clipped waveform area is the integral of an amplitude-limited trace over the specified interval. It can differ from the unclipped area by a different proportion than the change in peak height. The amplifier clipping article gives the instantaneous limiter model and a rectangular-pulse example; real saturated integrators can also have recovery dynamics.^[ref]

An original triangular example takes

v (t) = A max (1 - ∣ t ∣/ T, 0)

with

A > 0

. Its true area is

A T

. Clip its top at

0 < L < A

, with the zero baseline unchanged. The missing region is a triangle of height

A - L

and base

2 T (1 - L / A)

, so

\int v_{clipped} (t) d t = A T - \frac{T ( A - L ) ^{2}}{A} = T (2 L - \frac{L ^{2}}{A}) .

For

A = 4 V

L = 2 V

and

T = 1 ms

, the area falls from

4

3 V ms

. The peak is halved but the area loses only

25%

. The clipping loss for a triangular pulse therefore cannot be inferred merely by applying the peak-loss percentage to its integral.

Figure 1.
Ideal triangular clipping halves the peak while removing one quarter of the waveform area.
**Details**.

Record input and output together while changing gain or attenuation to test whether the trace is clipped. Recovering area by fitting an assumed triangle is a model-based correction, not recovery of an arbitrary waveform from its plateau. Baseline errors, limited bandwidth and overload recovery require their own measurement models.

Clipping loss for a triangular pulse ( $Δ A = T (A - L)^{2} / A$ )

The clipping loss for a triangular pulse is the area removed when a triangular waveform exceeds an amplitude limit. In the ideal model of clipped waveform area,

v (t) = A max (1 - ∣ t ∣/ T, 0)

and the upper limit is

0 < L < A

. The original area is

A T

; the missing top triangle has area

Δ A = \frac{T ( A - L ) ^{2}}{A}, \frac{Δ A}{A T} = (1 - \frac{L}{A})^{2} .

The geometry is derived in clipped waveform area, with its original diagram. Here

T

is the half-width of the full support, not the width of the clipped plateau.

A useful inverse problem asks how much peak truncation an area-error tolerance permits. If the allowable fractional loss is

0 < η < 1

, the ideal triangle requires

\frac{L}{A} \geq 1 - η .

For an original

A = 5 V

T = 2 μ s

pulse, a

1%

area-loss allowance requires

L \geq 4.5 V

. At equality, the peak is reduced by

10%

but the area changes from

10

9.9 V μ s

. The plateau duration is only

2 T (1 - L / A) = 0.4 μ s

. This is a shape-dependent calculation, not a universal relationship between peak error and integral error.

An attenuated simultaneous trace can test whether the input is approximately triangular and whether its duration stays fixed as amplitude changes. Baseline and bandwidth must be comparable before an area ratio is meaningful. A real saturated integrating amplifier can have additional overload recovery, which the instantaneous clipping model omits.^[ref] The formula supplies a conditional error estimate; it cannot identify an arbitrary missing waveform from its plateau.

Integrating amplifier

An integrating amplifier produces an output proportional to the time integral of its input over an intended operating range. A common circuit uses an operational amplifier, an input resistor

R

and a feedback capacitor

C

. With the non-inverting input held at zero, ideal negative feedback maintains a virtual ground at the inverting input. Negligible amplifier input current then gives

\frac{v _{in}}{R} = - C \frac{d v _{out}}{d t}, v_{out} (t) = v_{out} (t_{0}) - \frac{1}{RC} \int_{t_{0}}^{t} v_{in} (s) d s .

The initial output records the capacitor's initial charge. Texas Instruments' circuit note derives this inverting relation and explains why real integration is limited by the circuit time constant and amplifier bandwidth.^[ref]

For an original example, choose

R = 100 kΩ

and

C = 10 nF

, so

RC = 1 ms

. A constant0.20volt input lasting2milliseconds changes the output by

- 0.40 V

. Repeating ten such pulses without intervening input or integrator reset changes it by

- 4.0 V

in the ideal model. The output retains information about accumulated pulse area, rather than only the present input value.

A small offset also accumulates. With the same components, a residual input-equivalent1millivolt gives a slope of

- 1 V s^{- 1}

. Starting from zero, an idealized negative output limit at5volts would be reached in5seconds. The finite supply range causes amplifier clipping; an ideal integral extending indefinitely is not physically available.

Putting a resistor

R_{f}

in parallel with the feedback capacitor supplies a DC path. Under ideal amplifier assumptions its zero-state transfer function is

H (s) = - \frac{R _{f} / R}{1 + s R _{f} C} .

At frequencies where

∣ s R_{f} C ∣ ≫ 1

, this approaches

- 1/ (s RC)

; at low frequency it instead approaches the finite gain

- R_{f} / R

. The resistor prevents unrestricted DC accumulation while changing the lowest usable integration frequency.^[ref]

An integrating amplifier can therefore turn a short detector pulse into a measurable accumulated output, but its initial condition, reset, baseline, frequency range and output limits belong to the measurement model. A charge amplifier is a related current-input arrangement in which collected charge is converted through feedback capacitance.

Integrator reset

An integrator reset establishes the charge on an integrating amplifier's feedback capacitor before the next measurement. Without it, the next output includes the previous initial condition, and repeated input pulses or input offset voltage can eventually cause amplifier clipping. Resetting makes consecutive measurement intervals comparable; it does not reconstruct a pulse already lost to amplifier clipping.

Consider an inverting integrating amplifier with the input held at zero during reset. Place an analog switch across its feedback capacitor

C

. In the approximation of a stable ideal operational amplifier maintaining a virtual ground, a closed switch with constant on-state electrical resistance

R_{on}

gives the RC circuit relation

\frac{d v _{o}}{d t} = - \frac{v _{o}}{R _{on} C}, v_{o} (t) = V_{old} e^{- t / (R_{on} C)} .

This exponential decay gives an integrator reset settling time for residual magnitude at most

ε

T_{reset} \geq R_{on} C ln \frac{∣ V _{old} ∣}{ε} when ∣ V_{old} ∣ > ε .

For stipulated values

C = 10 nF

R_{on} = 10 kΩ

and

∣ V_{old} ∣ = 0.50 V

, the reset time constant is

100 μ s

. Reaching a residual of

1 mV

requires about $621 μ s$ in this model. Actual amplifier drive, stability and recovery from overload can change the response. A switch's control delay also differs from the full circuit's settling time.^[ref]

Opening the reset switch can itself disturb the initial condition. Analog switch charge injection transfers a small charge to the connected capacitor, producing a reset charge-injection pedestal of magnitude

∣Δ v ∣ = \frac{∣ Q _{inj} ∣}{C} .

For a stipulated

10 pC

deposited on

10 nF

, this step is

1 mV

. Its sign depends on the circuit and charge direction. A longer reset suppresses the preceding exponential residual but need not suppress the new step created when the switch opens. Analog Devices illustrates this capacitive coupling mechanism and the resulting output step separately from retained-charge settling.^[ref]

A practical experiment repeats zero-input measurements with several reset durations and reads the output at the same delay after switch opening. A decreasing residual indicates incomplete discharge; a persistent offset can instead include reset charge-injection pedestal, input offset voltage and subsequent drift. Repeated readings help separate the reproducible offset from noise. The ACF2101 provides a concrete historical implementation: separate hold and reset controls disconnect the input and discharge the integration capacitor, and its datasheet shows the sequence of hold, integration and reset states.^[ref]

The reset interval also creates integrator reset dead time: charge arriving while the circuit is being reset may not contribute to the next measured integral. Pulse timing relative to the reset therefore matters. A perfectly repeatable baseline alone does not establish that every input pulse was captured.

Integrator reset dead time ( $T_{dead}$ )

Integrator reset dead time is the interval during which incoming charge is excluded from the reported measurement because the integrator is resetting or not yet ready for acquisition. A switched-integrator implementation has distinct integration, hold and reset states; the historical datasheet shows those states and their timing.^[ref]

For an original periodic schedule, acquire during the first

80 μ s

of every

100 μ s

cycle, reset for the next

10 μ s

and exclude the final

10 μ s

for settling. The duty cycle is

80%

. If short-pulse arrival phases are independent and uniform over that cycle, the expected captured fraction is

0.80

That fraction does not apply to every pulse train. Pulses spaced by

100 μ s

and arriving at phase

85 μ s

are all missed in the ideal schedule. The same train at phase

20 μ s

is entirely captured. The clock synchronization matters as much as the fraction of time spent acquiring.

A bench check compares accepted events with an independent pulse monitor while changing their phase relative to the reset command. State whether the excluded interval includes the switch delay, discharge interval, post-opening transient and readout recovery. A stable zero-input baseline alone cannot demonstrate that every pulse was accepted. The integrator reset settling time and a reset charge-injection pedestal concern readiness and initial conditions, while dead time concerns which signal arrivals contribute at all.

Reset charge-injection pedestal ( $∣Δ v ∣ = ∣ Q_{inj} ∣/ C$ )

A reset charge-injection pedestal is a step in the initial integrator output caused by charge transferred when the reset switch changes state. It can remain after an arbitrarily long preceding discharge. The integrator reset article distinguishes it from a decaying residual; the physical switched-integrator datasheet separately specifies charge-transfer errors.^[ref]

For an original example, let the net opening charge have magnitude

2 pC

on an integration capacitance of

1 nF

. The output step has magnitude

2 mV

. If interpreted as photodiode signal charge with constant responsivity

0.50 A/W

, it would imitate

Q / R = 4 pJ

of incident energy under the linear model. A positive step interpreted as signal would bias a true

20 pJ

measurement by

20%

. The actual polarity depends on the circuit.

Repeated zero-input acquisitions at the same post-opening delay estimate the mean pedestal. Subtracting that mean does not remove reset pedestal variance. For a fixed capacitance, an opening-charge standard deviation of

0.10 pC

gives an output standard deviation of

0.10 mV

in the same stipulated model.

Varying the preceding reset duration helps distinguish residual discharge from a step created by opening. Gain, capacitance, signal level and readout delay must remain comparable. Adding capacitance can reduce the step per unit charge but also changes the signal conversion and the full circuit's settling behavior.

Reset pedestal variance ( $σ_{v}^{2} = σ_{Q}^{2} / C^{2}$ )

Reset pedestal variance is the acquisition-to-acquisition variance of the output offset associated with integrator reset. In a model where the only fluctuating contribution is an opening charge

Q

on fixed capacitance

C

P = Q / C, Var (P) = Var (Q) / C^{2} .

Subtracting the mean of the reset charge-injection pedestal removes its constant component, not the random spread. The physical datasheet distinguishes charge-transfer offset from output noise; its charge-transfer limit alone is not a statistical variance specification.^[ref]

Finite blank measurements introduce another contribution. Suppose independent pedestals have mean

μ

and standard deviation

σ_{P}

. Use

M

independent zero-input acquisitions to estimate

μ

, then subtract that same blank sample mean from each of

N

new signal acquisitions. With a constant signal and no other noise, the corrected mean has

Var (\overline{Y} - \overline{P}_{blank}) = \frac{σ _{P}^{2}}{N} + \frac{σ _{P}^{2}}{M} .

This variance of a pedestal-corrected sample includes the uncertainty of the shared correction. Its second contribution does not shrink when more signal acquisitions reuse the same blank estimate. Covariance-based uncertainty propagation retains such shared terms.^[ref]

For original stipulated

σ_{P} = 0.20 mV

N = 100

and

M = 25

, the corrected mean has standard deviation

0.0447 mV

. An exactly known pedestal mean would give

0.0200 mV

. Repeated zero-input acquisitions at a fixed delay after switching measure the combined pedestal/readout spread; separating its mechanisms requires additional tests. Slow drift or correlations between acquisitions invalidate the independent-sample formula and must enter the measurement model.

Variance of a pedestal-corrected sample

The variance of a pedestal-corrected sample quantifies the random spread remaining after subtracting an estimated baseline from a signal acquisition. Subtracting a mean reset charge-injection pedestal removes an offset; it does not automatically remove reset pedestal variance. For a raw signal sample

Y

and pedestal estimate

B

Var (Y - B) = Var (Y) + Var (B) - 2 Cov (Y, B) .

The covariance term determines whether subtraction suppresses shared fluctuations or adds independent noise. The GUM's correlated-input rule gives this identity directly for the linear measurement model

f (Y, B) = Y - B

.^[ref]

Two correction procedures have different statistical consequences. First suppose signal acquisitions have independent pedestals

P_{i}

of variance

σ_{P}^{2}

and independent readout noise

η_{i}

of variance

σ_{η}^{2}

. A separate mean of

M

independent blank acquisitions, with individual variance

σ_{B}^{2}

, is reused for every signal sample:

D_{i} = s + P_{i} + η_{i} - \overline{B} .

After removing any constant means, independence gives

Var (D_{i}) = σ_{P}^{2} + σ_{η}^{2} + \frac{σ _{B}^{2}}{M}, Cov (D_{i}, D_{j}) = \frac{σ _{B}^{2}}{M} (i \neq = j) .

Consequently, averaging

N

corrected samples gives

Var (\overline{D}) = \frac{σ _{P}^{2} + σ _{η}^{2}}{N} + \frac{σ _{B}^{2}}{M} .

The shared blank correction creates a common uncertainty floor, as in shared calibration error.

Alternatively, a baseline and signal reading from the same acquisition can share a fluctuating pedestal. In an idealized correlated double sampling model,

R = B_{0} + e_{R}

and

Y = s + B_{0} + e_{Y}

, so

Y - R = s + e_{Y} - e_{R}

: the common

B_{0}

cancels. Independent readout noises remain and their variances add. More generally, if paired readings each have standard deviation 0.20millivolt and correlation coefficient 0.9, their difference has standard deviation

2 (0.20)^{2} (1 - 0.9) mV \approx 0.0894 mV .

Treating that pair as independent would predict0.283millivolt instead.

An experimental assessment records paired zero-input samples at the actual acquisition delays and estimates their covariance, then distinguishes that procedure from reusing a separate blank mean. The ACF2101 datasheet specifies output noise and charge-transfer errors separately; a charge-transfer limit is not itself a pedestal variance or evidence for a particular correlation.^[ref]

Integrator reset settling time ( $T_{reset}$ )

The integrator reset settling time is the time required to reach a stated error band under the reset/readout sequence. It is not merely the switch's control propagation delay. The primary switch tutorial distinguishes switching time from complete-circuit settling.^[ref]

The integrator reset article derives an ideal residual

V_{0} e^{- T / τ}

, with

τ = R_{on} C

. A focused extension includes an opening pedestal whose magnitude is at most

p

. A conservative final-error bound is

∣ e ∣ \leq ∣ V_{0} ∣ e^{- T / τ} + p .

To guarantee

∣ e ∣ \leq ε

from this bound, require

ε > p

and

T \geq τ lo g \frac{∣ V _{0} ∣}{ε - p}

when the logarithm is positive. This reset error budget with a persistent pedestal assigns separate parts of the tolerance to the residual and the opening event.

For stipulated

∣ V_{0} ∣ = 0.40 V

τ = 20 μ s

p = 2 mV

and

ε = 3 mV

, the required duration is about

119.8 μ s

. A tolerance of

1 mV

cannot be guaranteed by waiting longer under the same pedestal bound. Accidental cancellation of opposite-sign errors is not a worst-case guarantee.

Measure the output against a stated band at a reproducible delay after opening. Ringing, amplifier drive limits and prior overload can invalidate a single-exponential model; the device datasheet treats output-overload recovery separately.^[ref] The resulting acquisition exclusion is part of integrator reset dead time.

Reset error budget with a persistent pedestal

A reset error budget with a persistent pedestal assigns separate tolerance to a decaying pre-reset residual and an offset created when the reset switch opens. Increasing the preceding discharge time can reduce the former without reducing the latter. The integrator reset settling time article derives the basic worst-case bound and its logarithmic reset-duration requirement.

A focused extension includes leakage during a fixed post-opening readout delay

d

. Let the pre-reset residual magnitude be at most

R

, its decay time constant be

τ

, the opening reset charge-injection pedestal magnitude be at most

p

, and subsequent electric current magnitude be at most

I_{m a x}

on fixed capacitance

C

. The triangle inequality gives

∣ e ∣ \leq R e^{- T / τ} + p + \frac{I _{m a x} d}{C} .

This separates a duration-controlled term from an error floor

F = p + I_{m a x} d / C

. For

R > 0

and a required guarantee

∣ e ∣ \leq ε

, finite reset time is possible from this bound only when

ε > F

, and

T \geq max (0, τ lo g \frac{R}{ε - F}) .

For an original chosen circuit, take

R = 0.10 V

τ = 5 μ s

p = 0.50 mV

C = 100 pF

I_{m a x} = 1.0 nA

and

d = 20 μ s

. Leakage consumes

0.20 mV

. A

1.0 mV

total tolerance leaves

0.30 mV

for the old residual, requiring about

29.0 μ s

of reset. A

0.60 mV

tolerance requires changing the stipulated pedestal or readout conditions; reset duration alone cannot guarantee it.

These are worst-case bounds, not root-sum-square standard uncertainties. Test the discharge by varying

T

, the opening step with zero-input records, and the subsequent drift by varying

d

. Real charge transfer depends on switching sequence, and prior overload can require separate recovery.^[ref] Accidental cancellation of signed errors is not a reproducible worst-case margin.

Charge amplifier

An amplifier that converts input charge to voltage through a feedback capacitance; used to read a piezoelectric stress sensor while controlling electrical loading.

Charge-sensitive preamplifier

A charge-sensitive preamplifier converts a detector's input charge pulse into an output electric potential difference. A high-gain electronic amplifier with capacitive negative feedback directs the collected charge onto a feedback capacitor. In the ideal inverting approximation,

Δ V_{out} = - \frac{Q}{C _{f}}, Q = \int i (t) d t,

where

C_{f}

is the feedback capacitance and

i (t)

the input electric current. The sign depends on the chosen current direction and circuit convention; the amplitude measures charge rather than just peak current.^[ref]

For an illustrative pulse with

Q = 2 fC

and

C_{f} = 0.5 pF

, the ideal output step has magnitude4mV. A feedback resistor can discharge the capacitor and restore the baseline. With

R_{f} = 100 MΩ

, the simple decay time is

R_{f} C_{f} = 50 μ s

. Charge arriving on a comparable time scale will leak away during collection, so the ideal step formula requires a sufficiently short input pulse.

The circuit is useful with a germanium detector, whose radiation-induced electron-hole pairs produce a small charge signal. Finite amplifier gain, detector capacitance, input noise and subsequent pulse shaping affect the measured result. The preamplifier's role is to preserve information in that charge signal; increasing gain cannot by itself remove the uncertainty introduced before amplification.^[ref]

Operational amplifier

An operational amplifier is a differential electronic amplifier whose unloaded voltage is modeled in its linear regime by

v_{o} = A (s) (v_{+} - v_{-})

. Its large open-loop gain, large input impedance and small output impedance make negative feedback useful for setting a reproducible transfer function with external components. Supply voltages bound the available output swing; the linear model does not apply after saturation.

Op amp differentiator ( $V_{out} = - RC d V_{in} / d t$ )

For an ideal operational amplifier with grounded non-inverting input, connect an input capacitor

C

to the inverting input and a feedback resistor

R

from output to that input. The virtual ground and Kirchhoff's current law give

C \dot{V}_{in} = - V_{out} / R

. The ideal response amplifies high-frequency noise, so practical differentiators restrict its operating band and maintain feedback stability.

Summing amplifier ( $V_{o} = - R_{f} \sum_{j} V_{j} / R_{j}$ )

An inverting operational amplifier can combine currents from several input resistors at one virtual ground. Kirchhoff's current law and negligible amplifier input current give the displayed weighted sum. Replacing the feedback resistance by a capacitor gives a weighted op amp integrator. The formulas assume stable negative feedback and operation within the amplifier's linear output range.

Noise gain of an operational amplifier ( $G_{n} = 1/ β$ )

The closed-loop gain from an equivalent differential input-voltage disturbance to the output is the noise gain. For an ideal-input inverting amplifier,

β = R_{1} / (R_{1} + R_{2})

and

G_{n} = 1 + R_{2} / R_{1}

, although the voltage gain is

- R_{2} / R_{1}

. A dominant-pole amplifier has approximate closed-loop bandwidth

f_{T} / G_{n}

when loop gain is large at low frequency and the circuit is stable.

Non-inverting operational amplifier ( $K = 1 + R_{f} / R_{g}$ )

A non-inverting operational amplifier applies the signal to its non-inverting input and returns part of the output to its inverting input through negative feedback. Connect resistor

R_{f}

from the output to the inverting input, and resistor

R_{g}

from that input to a reference circuit node at electric potential

V_{ref}

In stable, unsaturated ideal operation, the inputs draw no electric current and their electric potentials are equal. Writing the signal as

V_{in}

, Kirchhoff's current law at the inverting input gives

\frac{V _{in} - V _{out}}{R _{f}} + \frac{V _{in} - V _{ref}}{R _{g}} = 0,

V_{out} = (1 + \frac{R _{f}}{R _{g}}) V_{in} - \frac{R _{f}}{R _{g}} V_{ref} .

For a grounded reference circuit node, the voltage gain is

1 + R_{f} / R_{g}

. For example,

R_{f} = 20 kΩ

and

R_{g} = 10 kΩ

give gain three. The equal-input-potential approximation requires sufficiently large loop gain; amplifier saturation or unstable feedback invalidates it.^[ref]

Amplifier saturation

In amplifier saturation, the requested output lies outside the amplifier's linear operating range, such as when supply rails limit output voltage. The negative feedback virtual short approximation then need not hold. Output swing, current drive and recovery behaviour depend on the device and load; finite slew rate is a separate dynamic limit even when the output has not reached a rail.

Operational-amplifier negative feedback ( $A_{cl} = A / (1 + A β)$ )

Return a fraction of the output to the inverting input so that it opposes the input difference. Large stable loop gain makes the closed-loop gain depend mainly on the external feedback ratio rather than the uncertain open-loop gain. Frequency-dependent phase lag can destabilize the loop; saturation and finite slew rate also limit the approximation.^[ref]

Closed-loop gain ( $A_{cl} = A / (1 + A β)$ )

The closed-loop gain is the input-to-output transfer after closing the feedback connection. In the elementary noninverting voltage model it tends to

1/ β

for large stable loop gain, rather than retaining the uncertain open-loop gain

A

. A frequency-dependent transfer must be checked for stability before that approximation is used.

Loop gain ( $L (ω) = A (ω) β (ω)$ )

The loop gain is the product of the forward amplifier response and the return-network fraction, with the summing-junction minus sign kept explicit. Closed-loop poles are determined by

1 + L = 0

in this convention. Large low-frequency magnitude controls gain error, while frequency-dependent phase affects stability.

Phase margin ( $PM = π + ar g L (ω_{c}), ∣ L (ω_{c}) ∣ = 1$ )

 1  0

The phase margin measures the remaining phase lag before a negative-feedback loop reaches the critical phase

- π

at unity loop magnitude, using a continuous phase convention. Positive adequate margin is a useful stability and transient-response design diagnostic for standard single-crossover amplifier loops. More general unstable open-loop systems and multiple crossovers require the full stability criterion.

Noninverting amplifier

A voltage-feedback operational amplifier driven at its noninverting input, with a feedback divider

R_{f}, R_{g}

at its inverting input, has ideal gain

1 + R_{f} / R_{g}

under stable negative feedback.

Inverting amplifier

A voltage-feedback operational amplifier with its noninverting input grounded and input and feedback resistances

R_{i}, R_{f}

has ideal gain

- R_{f} / R_{i}

. Virtual short and negligible input current give the result by node-current balance.

Inverting RC high-pass amplifier ( $H (ω) = - iω R_{f} C / (1 + iω R_{i} C)$ )

An ideal operational amplifier with a series input resistor and capacitor, resistive feedback and a grounded noninverting terminal realizes the displayed high-pass filter. Virtual ground and Kirchhoff's current law give

H = - R_{f} / [R_{i} + 1/ (iω C)]

. Its phase is

- π /2 - tan^{- 1} (ω R_{i} C)

in the

e^{iω t}

convention. Equal resistances do not make its phase frequency independent.

Finite-input-resistance inverting amplifier ( $G = - \frac{R _{2} / R _{1}}{1 + ( 1 + R _{2} / R _{1} + R _{2} / R _{in} ) / A}$ )

With the noninverting input grounded, a differential input impedance

R_{in}

draws current from the summing node. For zero output impedance,

V_{o} = - A v

and Kirchhoff's current law gives

(v - V_{i}) / R_{1} + (v - V_{o}) / R_{2} + v / R_{in} = 0

. Eliminating

v

yields the displayed voltage gain. The resistor-ratio result requires

∣ A ∣ ≫ 1 + R_{2} / R_{1} + R_{2} / R_{in}

as well as stable, unsaturated operation. The same expression applies to small-signal phasors with complex

A (f)

Inverting two-pole band-pass filter ( $H (s) = - Ks τ_{1} / [(1 + s τ_{1}) (1 + s τ_{2})]$ )

An ideal inverting operational amplifier with series

R_{1}, C_{1}

input and parallel

R_{2}, C_{2}

feedback has the displayed transfer function, where

K = R_{2} / R_{1}

and

τ_{i} = R_{i} C_{i}

. Its peak is at

ω_{0} = 1/ τ_{1} τ_{2}

with voltage gain

K τ_{1} / (τ_{1} + τ_{2})

. A wide input-high-pass/feedback-low-pass separation produces a broad plateau, not a narrow resonance. Validity requires stable negative feedback, sufficient loop gain and linear output operation.

Selectivity bound for a two-real-pole band-pass ( $Q = τ_{1} τ_{2} / (τ_{1} + τ_{2}) \leq 1/2$ )

For a response proportional to

s / [(1 + s τ_{1}) (1 + s τ_{2})]

with positive time constants, its half-power width is

1/ τ_{1} + 1/ τ_{2}

. Combining with the geometric-mean centre frequency gives the displayed quality factor; the arithmetic-geometric mean inequality proves the bound. Equality requires matched time constants and gives half-power frequencies

(2 \pm 1) ω_{0}

. Adjusting gains does not make this topology a high-Q resonant filter.

Inverting low-pass amplifier ( $G (ω) = - R_{f} / [R_{i} (1 + iω R_{f} C)]$ )

An ideal operational amplifier with a grounded noninverting input, input resistor

R_{i}

, and parallel feedback resistor

R_{f}

and capacitor

C

implements a low-pass filter. The virtual short and Kirchhoff's current law give

V_{out} / V_{in} = - Z_{f} / R_{i}

, where

Z_{f} = R_{f} / (1 + iω R_{f} C)

. The DC gain magnitude is

R_{f} / R_{i}

and the cutoff frequency is

1/ (2 π R_{f} C)

. The capacitance reduces high-frequency feedback electrical impedance, causing the gain magnitude to fall.

Virtual short

Under stable negative feedback and within its linear operating range, an ideal voltage-feedback operational amplifier has equal input voltages. This relation is a consequence of large open-loop gain, and does not imply current flow between the inputs.

Op amp integrator

An op amp integrator places a resistor

R

between the input source and the inverting input of an operational amplifier, and a feedback capacitor

C

between that input and the output, with the non-inverting input grounded. For an ideal operational amplifier, Kirchhoff's current law gives

v_{in} / R = - C d v_{o} / d t

, hence

v_{o} (t) = v_{o} (t_{0}) - \frac{1}{RC} \int_{t_{0}}^{t} v_{in} (u) d u, H (s) = - \frac{1}{s RC} .

The initial capacitor charge supplies the integration constant. A parallel feedback resistor

R_{f}

replaces the transfer by

H (s) = - (R_{f} / R) / (1 + s R_{f} C)

: the direct-current gain becomes finite while integration is recovered when

∣ s R_{f} C ∣ ≫ 1

. This limits offset-driven saturation. ^[ref]

Finite-gain operational-amplifier integrator ( $H (s) = \frac{s C r _{o} - A ( s )}{1 + s C { r _{o} + R [ 1 + A ( s )]}}$ )

Consider an op amp integrator with infinite input impedance, an internal controlled voltage

u = - A (s) v

where

v

is the inverting-input voltage, and a series output impedance equal to a resistance

r_{o}

. Assume no external output load. Writing

y

for the output, Kirchhoff's current law gives

\frac{v _{in} - v}{R} = s C (v - y), \frac{u - y}{r _{o}} = s C (y - v) .

Eliminating

u

and

v

yields

H (s) = \frac{y}{v _{in}} = \frac{s C r _{o} - A ( s )}{1 + s C { r _{o} + R [ 1 + A ( s )]}} .

The expression at

r_{o} = 0

is obtained by its limit. In particular, constant gain

A_{0}

and

r_{o} = 0

give

H (s) = - A_{0} / [1 + s RC (1 + A_{0})]

: a finite direct-current gain followed by an integrating regime. For the dominant-pole model

A (s) = A_{0} / (1 + s / ω_{a})

and

r_{o} = 0

H (s) = \frac{- A _{0}}{1 + s [ ω _{a}^{- 1} + ( 1 + A _{0} ) RC ] + s ^{2} RC / ω _{a}} .

A_{0} ≫ 1

and

A_{0} ω_{a} RC ≫ 1

, there are separated turnover frequencies near

1/ (A_{0} RC)

and

A_{0} ω_{a}

. The gain magnitude is respectively constant, proportional to

ω^{- 1}

and proportional to

ω^{- 2}

. With the convention

e^{iω t}

a continuous phase choice passes from

18 0^{\circ}

through

9 0^{\circ}

0^{\circ}

. If

r_{o} > 0

and

A (iω) \to 0

, capacitive feedthrough instead gives the ultimate limit

r_{o} / (R + r_{o})

. Specifying finite gain alone therefore does not specify a unique high-frequency response.

Slew rate ( $max ∣ d v_{o} / d t ∣$ )

The slew rate bounds the large-signal output-voltage change per unit time. It is distinct from a small-signal gain-bandwidth product. A sinusoidal output of amplitude

V_{p}

and angular frequency

ω

needs

ω V_{p}

below the available slew rate to avoid this source of distortion.

Input bias current ( $I_{b}$ )

An input bias current is a direct-current component drawn by an input terminal of a real operational amplifier. Through a source resistance it produces a voltage error, and through the feedback capacitor of an op amp integrator it can produce an output ramp. Its magnitude and sign depend on the amplifier technology and operating conditions.

Input offset voltage ( $V_{os}$ )

The input offset voltage of an operational amplifier is the differential direct-current input voltage needed to make its output zero at a specified operating point. Its effect resembles a small unwanted input signal and can cause sustained output drift in an op amp integrator.

Open-loop gain ( $A (s)$ )

The open-loop gain of an operational amplifier is the ratio of its output voltage to its differential input voltage before an external feedback control connection is applied. A common small-signal model is

A (s) = A_{0} / (1 + s / ω_{a})

, with a large direct-current gain

A_{0}

and a dominant pole at

- ω_{a}

. Above

ω_{a}

its magnitude falls approximately inversely with angular frequency.

Gain-bandwidth product ( $f_{t}$ )

For a dominant-pole voltage-feedback operational amplifier with

A (s) = A_{0} / (1 + s / ω_{a})

and

A_{0} ≫ 1

, the unity-gain angular frequency is approximately

ω_{t} = A_{0} ω_{a}

. In the range where this pole dominates, a roughly constant closed-loop noise gain

G_{N}

gives a bandwidth approximately

f_{t} / G_{N}

. This approximation depends on the amplifier model and feedback control circuit; it is not a universal statement about all amplifiers or all frequency-dependent feedback networks. ^[ref]

Ideal operational amplifier

An ideal operational amplifier has infinite open-loop gain and input impedance, zero output impedance, unlimited response speed and zero input offset voltage and input bias current. Its input currents vanish. In a stable linear circuit with negative feedback and a finite output, its differential input voltage tends to zero as the open-loop gain tends to infinity. Thus

i_{+} = i_{-} = 0

and

v_{+} = v_{-}

are the familiar conditional circuit rules. The equality of the input voltages cannot be imposed on an open-loop, unstable or saturated circuit.

Inverting operational amplifier ( $V_{o} / V_{i} = - R_{f} / R_{in}$ )

Connect a resistor

R_{in}

from the input source to the inverting input, a feedback resistor

R_{f}

from output to that same input, and ground the non-inverting input. For ideal linear operation the inverting node is a virtual ground. Kirchhoff's current law gives

V_{i} / R_{in} + V_{o} / R_{f} = 0

, yielding the displayed voltage gain. The source sees input impedance

R_{in}

, even though the amplifier input itself has infinite input impedance.

Voltage gain ( $A_{v} = v_{out} / v_{in}$ )

The ratio of output to input signal electric potential difference for specified source and load conditions. A signed voltage gain records whether the output reverses polarity; its value can depend on frequency.

Loaded voltage gain ( $A_{v} (Z_{L})$ )

Loaded voltage gain is the ratio of an amplifier's output to input signal electric potential differences with a specified load connected. In a small-signal model, let the open-circuit output be

v_{oc} = A_{0} v_{in}

and let the complete amplifier have output impedance

Z_{o}

. A load

Z_{L}

then gives

A_{v} (Z_{L}) = \frac{v _{out}}{v _{in}} = A_{0} \frac{Z _{L}}{Z _{o} + Z _{L}} .

driving amplifier input impedance

This is the voltage divider result from Thévenin's theorem at the output terminals. The university source explains why a linear circuit can be replaced at specified terminals by a source and series impedance.^[ref] The output impedance used here must describe the complete amplifier at the stated operating point and frequency, including its feedback.

The input terminal matters too. For a generator

v_{s}

with source impedance

Z_{s}

Z_{i}

, the corresponding source-to-load ratio in a unilateral model is

\frac{v _{out}}{v _{s}} = A_{0} \frac{Z _{i}}{Z _{s} + Z _{i}} \frac{Z _{L}}{Z _{o} + Z _{L}} .

This includes both input and output loading; it differs from the terminal-to-terminal voltage gain defined above.

For an original resistive example, choose

A_{0} = 12

Z_{o} = 100 Ω

Z_{L} = 900 Ω

Z_{i} = 1 kΩ

and

Z_{s} = 50 Ω

. The loaded terminal gain is

10.8

, while the source-to-load gain is

72/7 \approx 10.286

. Reducing the load to

100 Ω

makes the terminal gain six, even though the stipulated open-circuit gain remains twelve. These are model parameters, not device specifications.

A direct test holds the actual amplifier input signal fixed, changes a known load and measures the output with an oscilloscope whose probe impedance is included in the effective load. Use small enough signals to retain linear operation and respect the amplifier output range. If the output-to-input ratio changes with loading, an unloaded gain alone is insufficient to predict the circuit's behavior.

At nonzero frequency the impedances and gain can be complex. A reactive-load phase shift in a finite-output-impedance amplifier can change both magnitude and phase, while input-output coupling or nonlinear current limiting can invalidate this simple unilateral divider model. The ideal feedback resistance-ratio examples in the manufacturer's introduction apply within their corresponding operating assumptions.^[ref]

Reactive-load phase shift in a finite-output-impedance amplifier ( $A_{v} / A_{0} = (1 + jω R_{o} C_{L})^{- 1}$ )

A reactive-load phase shift in a finite-output-impedance amplifier occurs because the load and output impedance form a frequency-dependent divider. In the model of loaded voltage gain, assume a positive real output resistance

R_{o}

, an ideal capacitive load

C_{L}

and open-circuit gain

A_{0}

approximately constant over the band of interest. With

ω = 2 π f

Z_{L} = \frac{1}{jω C _{L}}, \frac{A _{v} ( ω )}{A _{0}} = \frac{1}{1 + jω R _{o} C _{L}} .

The divider follows from the terminal equivalent described by the university circuit notes.^[ref]

Putting

τ = R_{o} C_{L}

gives

\frac{∣ A _{v} ∣}{∣ A _{0} ∣} = \frac{1}{1 + ( ω τ ) ^{2}}, ar g A_{v} - ar g A_{0} = - arctan (ω τ) .

Thus even an ideal capacitor can change both amplitude and phase when the source driving it has finite resistance. Its reactive current and energy exchange are described by complex electrical power; zero average dissipation in the ideal capacitor does not mean zero output-current demand.

For an original example, choose

R_{o} = 100 Ω

C_{L} = 10 nF

and

A_{0} = 10

. Then

τ = 1 μ s

and the load pole is

f_{p} = 1/ (2 π τ) \approx 159.2 kHz

. At that frequency the gain magnitude is

10/ 2 \approx 7.071

and the extra phase lag is

4 5^{\circ}

. A measured input of

10 mV

root mean square gives about

70.7 mV

root mean square at the capacitor, requiring approximately

0.707 mA

root-mean-square capacitive current.

A bench test holds the actual amplifier input fixed while sweeping frequency and compares loaded and unloaded output amplitudes and phases. Include probe capacitance in

C_{L}

. The group delay introduced by a capacitive amplifier load also matters when comparing pulse waveforms.

This single-pole calculation assumes the stated constant open-circuit gain and resistive output impedance. The complete amplifier may have additional frequency dependence and feedback effects. The manufacturer's ideal feedback-gain examples are defined within their operating assumptions.^[ref] Check the actual output-current and linear operating range before interpreting a departure from this model as a capacitor-only effect.

Group delay introduced by a capacitive amplifier load ( $τ_{g} (ω)$ )

The group delay introduced by a capacitive amplifier load is the negative angular frequency derivative of the extra wave phase produced by that load. For the resistive output model in reactive-load phase shift in a finite-output-impedance amplifier, divide the loaded transfer function by the unloaded one:

H_{rel} (ω) = \frac{1}{1 + iω τ}, τ = RC > 0, ϕ_{rel} = - arctan (ω τ) .

The added group delay is therefore

τ_{g} (ω) = - \frac{d ϕ _{rel}}{d ω} = \frac{τ}{1 + ( ω τ ) ^{2}} .

This subtraction of unloaded wave phase prevents the amplifier's intrinsic group delay from being attributed to the capacitor. The terminal model uses a Thévenin equivalent; the group delay definition differentiates an unwrapped wave phase, as in the SciPy signal-processing documentation. Its digital-filter function reports samples, whereas the analog derivative above uses radians per second and gives seconds.^[ref]^[ref]

For an original example, choose

R = 200 Ω

and

C = 10 nF

, hence

τ = 2 μ s

. At

ω τ = 1

, corresponding to

f = 1/ (2 π τ) \approx 79.6 kHz

, the added group delay is

1 μ s

. The same operating point has

- ϕ_{rel} / ω = π τ /4 \approx 1.571 μ s

: a single sinusoid's phase displacement and the delay of a narrow frequency packet need not agree.

A practical test applies a weakly modulated carrier, varies its central frequency, and measures the output modulation displacement while comparing loaded and unloaded operation. The group delay describes that narrow-band envelope only when the frequency response varies slowly across its bandwidth. The corresponding causal impulse response begins at zero time,

h (t) = e^{- t / τ} / τ

for

t \geq 0

, and vanishes for

t < 0

; it is not a rigidly translated impulse. Thus group delay versus pulse-front arrival for an RC load matters when a measured pulse is broad enough to change shape.

Group delay versus pulse-front arrival for an RC load

Group delay versus pulse-front arrival for an RC load distinguishes a narrow-band modulation displacement from the earliest response to a newly applied input. For the relative amplifier-load model in group delay introduced by a capacitive amplifier load, the causal impulse response is

h (t) = e^{- t / τ} / τ

for

t \geq 0

and zero for

t < 0

. Its convolution with an input that vanishes before zero also vanishes before zero. Nevertheless its group delay is

τ / [1 + (ω τ)^{2}]

, which is positive and frequency dependent. The phase-derivative definition concerns spectral components and their envelopes.^[ref]

An original finite-pulse calculation shows why a threshold measurement gives another time. For an initially relaxed load, apply a rectangular pulse of height

V_{0}

and duration

T > 0

. Convolution gives

v (t) = ⎩ ⎨ ⎧ 0, V_{0} (1 - e^{- t / τ}), V_{0} (1 - e^{- T / τ}) e^{- (t - T) / τ}, t < 0, 0 \leq t < T, t \geq T .

The first mathematical response occurs immediately after zero. A rising threshold equal to fraction

a

of the input pulse height is reached at

t_{a} = - τ lo g (1 - a)

only if the pulse lasts at least that long. This is the threshold-crossing time of a finite rectangular pulse through an RC load.

With

τ = 1 μ s

and

T = 0.1 μ s

, the largest output is only

(1 - e^{- 0.1}) V_{0} \approx 0.0952 V_{0}

: a

0.5 V_{0}

threshold is never reached. If

T = 3 μ s

instead, that threshold is crossed at

0.693 μ s

. Neither value is the

0.5 μ s

group delay evaluated at

ω τ = 1

A pulse generator and oscilloscope can compare the threshold observation with a slow modulation on a carrier; the chosen threshold and modulation bandwidth must be recorded. MIT's laboratory likewise separates square-wave decay measurements from sinusoidal amplitude/phase measurements.^[ref] If wiring adds a transport delay

d

, shift the impulse response to

h (t - d)

: the front moves to

d

, while the modulation delay becomes

d + τ_{g}

. The immediate onset of the unshifted lumped model is not a model of propagation along a finite-length cable.

Threshold-crossing time of a finite rectangular pulse through an RC load ( $t_{↑} = - τ lo g (1 - a)$ )

An electronic comparator registers a pulse only if its input reaches the chosen threshold. For an initially uncharged capacitor driven through an electrical resistance

R > 0

, a short rectangular pulse may end before that happens. The resulting threshold-crossing time of a finite rectangular pulse through an RC load depends on threshold and pulse duration, as well as the time constant

τ = RC

; it is not determined by group delay alone.

Take a positive input electric potential difference

V_{0}

for

0 \leq t < T

, zero input outside that interval, and output

v (t)

across a capacitance

C > 0

. Include the source's effective series electrical resistance in

R

. The initial condition is

v (0) = 0

. Kirchhoff's voltage law and the capacitor current relation give the first-order linear differential equation

τ \frac{d v}{d t} + v = v_{in} (t), v (t) = {V_{0} (1 - e^{- t / τ}), V_{0} (1 - e^{- T / τ}) e^{- (t - T) / τ}, 0 \leq t \leq T, t > T .

The output is a continuous function and reaches its maximum at the pulse's falling edge:

v_{peak} = V_{0} (1 - e^{- T / τ}) .

The input jumps there, but an ideal capacitor's stored electric charge cannot change discontinuously under the finite currents of this model.

Choose a fixed threshold

V_{th} = a V_{0}

with

0 < a < 1

. Solving the rising exponential function using a natural logarithm gives

t_{↑} = - τ lo g (1 - a), T_{m i n} = t_{↑} .

T < T_{m i n}

, the output never reaches the threshold. At

T = T_{m i n}

, it touches the threshold only at its peak; the ideal time spent strictly above threshold is zero. A nonzero high interval in an ideal non-inverting electronic comparator requires $T > T_{m i n}$ . This is RC pulse-width discrimination: different input durations can give a missing pulse or a finite output pulse even when their input heights are equal.

For

T > T_{m i n}

, solving the falling exponential decay gives

t_{↓} = T + τ lo g \frac{1 - e ^{- T / τ}}{a}, W = t_{↓} - t_{↑} = T + τ lo g \frac{( 1 - e ^{- T / τ} ) ( 1 - a )}{a} .

Here

W

is the time above threshold for an RC-filtered rectangular pulse, before any electronic comparator switching dynamics. It is not generally the input duration

T

. Just above

T_{m i n}

, differentiation gives

d W / d T = 1/ (1 - e^{- T / τ})

and hence

W \approx (T - T_{m i n}) / a

to first order; a half-height threshold gives slope two at the detection boundary.

For an original numerical example, take

R = 1 kΩ

C = 1 nF

V_{0} = 1 V

, and

V_{th} = 0.50 V

, so

τ = 1 μ s

. A

0.40 μ s

input peaks at only

0.3297 V

and is rejected. A

2.00 μ s

input peaks at

0.8647 V

and gives

t_{↑} = 0.6931 μ s, t_{↓} = 2.5477 μ s, W = 1.8546 μ s .

These are model calculations, not recorded instrument traces.

Figure 1.
Pulse duration determines whether an RC circuit reaches a threshold and how long it stays above it
. Original calculation for $τ = 1 μ s$ and a half-height threshold. The short pulse is rejected, the boundary-duration pulse just touches the threshold, and the longer pulse yields two crossings. The right panel shows the corresponding ideal above-threshold duration. **Details**.

A threshold near the asymptotic input height is also especially sensitive to noise and threshold measurement uncertainty. Holding the absolute input height

V_{0}

and

τ

fixed, the threshold timing sensitivity of an RC step response is

\frac{\partial t _{↑}}{\partial V _{th}} = \frac{τ}{V _{0} - V _{th}} .

(6)

For the same

1 V

1 μ s

model, a

1 mV

effective threshold perturbation gives approximately

2 ns

of timing change at

0.50 V

, but

10 ns

0.90 V

, by first-order uncertainty propagation. The rectangular pulse must still last long enough to reach the selected threshold; changing

a

together with

V_{0}

is a different sensitivity calculation.

A bench test uses a pulse generator and an oscilloscope to record both the applied electric potential difference and the capacitor output. Sweep

T

while keeping

V_{0}

and the actual threshold fixed, and allow enough time between pulses for the measured initial output to be negligible at the desired precision. Include probe and comparator-input capacitance in

C

. MIT's laboratory measures RC decay with a

47 nF

capacitor, a

1.5 kΩ

resistor and square-wave excitation; that gives a directly measurable

70.5 μ s

component-value time constant.^[ref] The pulse-duration sweep proposed here extends that decay measurement to a threshold observation. A real electronic comparator's input offset voltage, hysteresis and finite switching time must be separated from the ideal RC crossing times; a Schmitt trigger uses different rising and falling thresholds.

RC pulse-width discrimination

RC pulse-width discrimination converts an input-duration test into a threshold observation on an RC circuit. For a relaxed first-order load with time constant

τ > 0

, a positive rectangular input of height

V_{0}

and duration

T

reaches peak output

V_{0} (1 - e^{- T / τ})

. An ideal electronic comparator has a nonzero interval above fixed threshold

0 < V_{th} < V_{0}

precisely when

T > τ lo g \frac{V _{0}}{V _{0} - V _{th}} .

Equality only touches the threshold at the peak. The parent threshold-crossing time of a finite rectangular pulse through an RC load derives the full response and the rejected-pulse boundary.

This is a duration discriminator only while the input height is controlled. At a fixed duration, the same condition is

V_{0} > \frac{V _{th}}{1 - e ^{- T / τ}} .

A larger input can pass the threshold even when a smaller pulse of exactly the same duration fails. The minimum accepted duration decreases with height, with derivative

- τ V_{th} / [V_{0} (V_{0} - V_{th})]

For an original example, choose

τ = 2 μ s

V_{th} = 0.40 V

, and

T = 1 μ s

. The minimum height for a nonzero comparator interval is about

1.0166 V

. A

0.8 V

pulse peaks at about

0.3148 V

and is rejected; a

1.2 V

pulse peaks at about

0.4722 V

and is accepted. Treating this observation as a width-only decision would conflate two different inputs.

A pulse-generator experiment therefore sweeps width at a recorded height and threshold, measures the actual capacitor waveform on an oscilloscope, and allows the initial state to relax. A residual baseline in RC pulse-width discrimination changes the next pulse's peak and invalidates the relaxed-state formula. Probe and comparator input capacitance also belong in the effective time constant. The natural-decay apparatus in MIT's RC laboratory supplies a direct component-level check of that time constant.^[ref] Comparator propagation delay and hysteresis are additional dynamics, not part of the ideal RC acceptance inequality.

Residual baseline in RC pulse-width discrimination ( $V_{b}$ )

A capacitor need not finish discharging before the next pulse arrives. This residual baseline in RC pulse-width discrimination changes the next pulse's RC threshold-crossing time even if its applied height and duration are unchanged. The relaxed-state acceptance formula assumes an initial output of zero; a repeated pulse train can violate that assumption systematically.

Take a first-order RC circuit with time constant

τ = RC

, input high level

V_{0} > 0

, zero input low level and initial capacitor output

V_{b}

. During a pulse of duration

T

v (t) = V_{0} - (V_{0} - V_{b}) e^{- t / τ}, V_{p} = V_{0} - (V_{0} - V_{b}) e^{- T / τ} .

For

0 \leq V_{b} < V_{th} < V_{0}

, solving for the rising threshold gives

t_{↑} = τ lo g \frac{V _{0} - V _{b}}{V _{0} - V _{th}} .

A finite interval above threshold requires

T > t_{↑}

. At equality the output only touches the threshold at its peak. A positive residual

V_{b}

makes the crossing earlier than the zero-baseline crossing. If the output already exceeds the threshold at the start, this rising-crossing formula no longer describes a new edge.

The input of a repeated pulse train is a periodic function with high duration

T

, low duration

D > 0

and period

P = T + D

. Put

α = e^{- T / τ}

and

β = e^{- D / τ}

. The next baseline is the previous peak multiplied by

β

. Writing

b_{n}

for the baseline before pulse

n + 1

gives the linear recurrence relation

b_{n + 1} = β (1 - α) V_{0} + α β b_{n} .

Because

0 < α β = e^{- P / τ} < 1

, the deviation from its fixed point is a decaying geometric sequence:

b_{n} = b_{*} + (b_{0} - b_{*}) (α β)^{n}, b_{*} = \frac{β ( 1 - α ) V _{0}}{1 - α β}, V_{p, *} = \frac{( 1 - α ) V _{0}}{1 - α β} .

This periodic RC pulse-train baseline is a repeatable state of the circuit, rather than random readout noise. In the periodic regime, separate rising and falling comparator transitions require

b_{*} < V_{th} < V_{p, *}

. If

V_{p, *} \leq V_{th}

, there is no finite high interval. If

b_{*} \geq V_{th}

, there is no finite low interval: missing comparator reset in an RC pulse train can turn repeated input pulses into one sustained output state.

For an original calculation, choose

τ = 1 μ s

V_{0} = 1 V

V_{th} = 0.50 V

T = 0.40 μ s

and

D = 0.60 μ s

. An isolated relaxed pulse peaks at only

0.32968 V

and is rejected. The repeatable train instead has

b_{*} = 0.28623 V, V_{p, *} = 0.52155 V .

Its rising threshold occurs

0.35595 μ s

after each pulse starts. The falling crossing is

T + τ lo g (V_{p, *} / V_{th}) = 0.44219 μ s

, giving an above-threshold duration of

0.08624 μ s

. Starting from zero baseline, the first three pulses are rejected, but the fourth peaks at

0.51199 V

and crosses. A change in pulse acceptance need not mean that the source pulse itself changed.

Figure 1.
Residual capacitor charge makes a repeated short pulse cross a threshold that rejects the isolated pulse
. Original first-order model, with a 1 µs time constant, 0.4 µs high interval, 0.6 µs low interval and a half-height threshold. The first train starts relaxed; the second panel shows the repeatable baseline and peak. No measured waveforms are used. **Details**.

A useful design bound controls timing error rather than merely calling the circuit discharged. Put

a = V_{th} / V_{0}

and suppose

0 \leq V_{b} / V_{0} \leq ε < a

. Relative to the relaxed crossing,

Δ t = τ lo g (1 - V_{b} / V_{0}), ∣Δ t ∣ \leq - τ lo g (1 - ε) .

(6)

Since a nonnegative pulse train in this model has

V_{p} \leq V_{0}

, a low interval

D \geq τ lo g (1/ ε)

guarantees that baseline bound. Combining the inequalities yields a sufficient quiet interval required for an RC baseline timing budget

δ > 0

D \geq - τ lo g (1 - e^{- δ / τ}), ε = 1 - e^{- δ / τ} < a .

(7)

For a 1% baseline allowance,

D \geq 4.6052 τ

limits the crossing advance to

0.01005 τ

, or

10.05 ns

when

τ = 1 μ s

. The bound is conservative because it uses the largest possible peak.

A bench test holds pulse height, duration and threshold fixed while sweeping repetition period with a pulse generator. Record the actual input and capacitor output on an oscilloscope, including the baseline immediately before each pulse. Probe capacitance and effective source electrical resistance belong in

τ

. MIT's laboratory uses repetitive square-wave excitation to measure RC decay, providing a direct way to check the underlying time constant.^[ref] The calculations above assume ideal input edges and zero input low level; comparator hysteresis and switching dynamics require their own model.

Quiet interval required for an RC baseline timing budget ( $D \geq - τ lo g (1 - e^{- δ / τ})$ )

The quiet interval required for an RC baseline timing budget controls how much a residual capacitor baseline may advance the next threshold crossing. In residual baseline in RC pulse-width discrimination, a positive baseline

V_{b}

changes the relaxed crossing by

Δ t = τ lo g (1 - V_{b} / V_{0}) .

For a permitted advance

δ > 0

, requiring

∣Δ t ∣ \leq δ

is equivalent to

V_{b} / V_{0} \leq ϵ

, where

ϵ = 1 - e^{- δ / τ}

. To retain a fresh rising crossing, also require

ϵ < a = V_{th} / V_{0}

, equivalently

δ < - τ lo g (1 - a)

After a previous peak

V_{p}

, a zero-input low interval

D

gives

V_{b} = V_{p} e^{- D / τ}

. Hence a measured upper bound on that peak gives the sufficient interval

D \geq τ max {0, lo g \frac{V _{p}}{V _{0} ϵ}} .

Using only the model bound

V_{p} \leq V_{0}

recovers the conservative expression in the header,

D \geq - τ lo g (1 - e^{- δ / τ})

. The peak bound and initial-state assumptions are part of the guarantee. The next pulse must still last long enough to produce the rising crossing; this timing bound alone does not guarantee acceptance.

For an original timing budget, let

τ = 2 μ s

δ = 20 ns

and

a = 0.4

. Then

ϵ \approx 0.0099502 < a

, and the conservative interval is

D \geq 9.2203 μ s

. If a validated peak bound is only

V_{p} \leq 0.60 V_{0}

, it reduces to

8.1987 μ s

. Simply calling either interval several time constants long would hide the actual timing specification.

For

δ ≪ τ

, expansion gives

D \approx τ lo g (τ / δ) + δ /2

under the full-height peak bound. Tightening a small timing allowance by a factor of two therefore adds roughly

τ lo g 2

of quiet time. If the allowed advance is as large as the whole relaxed crossing time, a separate reset condition is still required; the logarithmic timing budget alone no longer ensures the initial output is below threshold.

A bench test measures the peak and the baseline while sweeping the low interval, keeping the threshold and pulse height fixed. MIT's RC laboratory supplies the natural-decay measurement used to check the underlying time constant.^[ref] Probe capacitance and source resistance belong in that measured time constant.

Missing comparator reset in an RC pulse train ( $V_{b} \geq V_{th}$ )

Missing comparator reset in an RC pulse train occurs when the filtered output never spends a finite interval below the reset threshold between pulses. In the periodic first-order model, with

α = e^{- T / τ}

and

β = e^{- D / τ}

, the baseline is the minimum output and equals

\frac{V _{b}}{V _{0}} = \frac{β ( 1 - α )}{1 - α β} .

For a nonhysteretic ideal electronic comparator with

a = V_{th} / V_{0}

V_{b} \geq V_{th}

leaves no finite low interval. At equality the waveform merely touches the threshold. This is different from a pulse whose peak never reaches threshold and therefore gives no finite high interval.

Solving the strict reset condition gives

D > τ lo g \frac{1 - α ( 1 - a )}{a} .

Separate rising and falling transitions also require the peak to exceed the threshold. Both inequalities matter, so increasing the quiet interval is not automatically sufficient to produce an accepted output pulse from a weak input.

For an original three-regime example, take

τ = 1 μ s

V_{0} = 1 V

T = 0.50 μ s

and

V_{th} = 0.40 V

. The reset boundary is

D \approx 0.46386 μ s

. At

D = 0.20 μ s

, the periodic baseline/peak are about

0.63992/0.78160 V

: after startup the electronic comparator does not reset. At

D = 1.0 μ s

, they are

0.18632/0.50648 V

, allowing both transitions. At

D = 10 μ s

, the peak is only about

0.39348 V

, so no finite high interval is produced. The same input height and high duration can therefore give three different output patterns as repetition changes.

The threshold-reset margin for a periodic RC pulse train must also accommodate uncertainty and switching dynamics. With a Schmitt trigger, the lower switching threshold controls reset while the upper one controls acceptance. The capacitor-level inequalities alone do not specify propagation delay or a real electronic comparator's minimum switching dwell time.

A test records the source, capacitor output and electronic comparator output together while sweeping

D

. A steady high output with a pulsing input should be compared with the measured capacitor minimum before being attributed to a source failure. The RC decay model can be checked independently using the primary laboratory's natural-response method.^[ref]

Threshold-reset margin for a periodic RC pulse train

The threshold-reset margin for a periodic RC pulse train is the separation between the reset threshold of an electronic comparator and the largest baseline that the periodic RC low-pass filter may leave between pulses. A positive margin excludes missing comparator reset in an RC pulse train in the ideal threshold model; its size measures tolerance to additional electric potential difference errors.

Let

V_{0} > 0

be the input high level,

T

the high duration,

D

the quiet duration and

τ > 0

the time constant. From the periodic solution in missing comparator reset in an RC pulse train, write

V_{b} = V_{0} \frac{β ( 1 - α )}{1 - α β}, α = e^{- T / τ}, β = e^{- D / τ}, m = V_{th} - V_{b} .

This defines a margin in volts, rather than in units of standard deviation. If a nominal baseline

\overset{ˉ}{V}_{b}

has a known absolute error bound

b_{b}

and the reset threshold

\overset{ˉ}{V}_{th}

has bound

b_{th}

, a sufficient worst-case condition is

m_{guaranteed} = \overset{ˉ}{V}_{th} - \overset{ˉ}{V}_{b} - b_{th} - b_{b} > 0.

These are simultaneous bounds on the actual baseline and threshold. Adding their standard uncertainties would not by itself provide a deterministic guarantee; a probabilistic statement requires a specified joint probability distribution.^[ref]

For an original example, let

V_{0} = 2 V

τ = 2 μ s

and

T = D = τ lo g 2

. Then

α = β = 1/2

V_{b} = 2/3 V

and the peak is

4/3 V

. A threshold of

0.800 V

gives

m = 0.133333 \dots V

. Bounds

b_{b} = 0.040 V

and

b_{th} = 0.020 V

leave

m_{guaranteed} = 0.073333 \dots V

. Raising the baseline bound to

0.120 V

would remove this guarantee even though the nominal waveform still crosses the threshold.

A positive minimum separation does not specify the reset dwell time below threshold in an RC pulse train. A real electronic comparator needs enough time to switch, and the peak must separately exceed the acceptance threshold. For a Schmitt trigger, use the lower switching threshold in

m

, while checking the upper one against the peak.

A focused bench test records the pulse generator output, capacitor output and electronic comparator output on an oscilloscope, then varies

D

near the predicted boundary. Compare the measured minimum with the reset threshold and record the low interval as well as the minimum. The underlying exponential decay can be checked by the natural-response experiment in the MIT laboratory; the margin calculation above is an original application of that model.^[ref]

Reset dwell time below threshold in an RC pulse train ( $t_{low}$ )

The reset dwell time below threshold in an RC pulse train is the continuous time for which the filtered electric potential difference lies below an electronic comparator's threshold between successive accepted pulses. A positive threshold-reset margin for a periodic RC pulse train ensures a crossing in the ideal model, but does not ensure a long enough low interval for the intended electronics.

Consider the periodic RC low-pass filter response to a high level

V_{0} > 0

lasting

T

, followed by zero input for a quiet time

D

. Let

τ > 0

be the time constant,

V_{b}

the periodic baseline at the start of the high interval and

V_{p}

the peak at its end. Assume a nonhysteretic ideal electronic comparator and

V_{b} < V_{th} < V_{p}

. Solving the two exponential segments gives the rising crossing time

t_{↑}

, measured from the high interval's start, and the falling crossing delay

s_{↓}

, measured from its end:

t_{↑} = τ lo g \frac{V _{0} - V _{b}}{V _{0} - V _{th}}, s_{↓} = τ lo g \frac{V _{p}}{V _{th}} .

The below-threshold interval runs from the falling crossing to the next rising crossing. Therefore

t_{low} = D - s_{↓} + t_{↑} .

Including

t_{↑}

matters: the low interval usually extends into the next input high interval. The natural exponential decay underlying these segments is directly testable with the switched-RC apparatus in the MIT laboratory.^[ref]

For an original exact example, take

V_{0} = 1 V

τ = 1 μ s

and

T = D = τ lo g 2

. The periodic solution in missing comparator reset in an RC pulse train gives

V_{b} = 1/3 V

and

V_{p} = 2/3 V

. At

V_{th} = 0.5 V

, both crossing delays equal

τ lo g (4/3)

, so

t_{low} = D \approx 0.693147 μ s

. The reset margin is a positive

1/6 V

, yet a stipulated requirement of at least

0.8 μ s

low time is not met.

The strict crossing assumptions are essential. At

V_{th} = V_{b}

, the waveform only touches the threshold and the low interval vanishes. At or above the peak there is no finite high interval to separate. A Schmitt trigger uses distinct switching thresholds, so its output-state interval requires the corresponding falling and rising crossings rather than substituting one threshold indiscriminately.

A proposed measurement records the pulse generator, capacitor and electronic comparator outputs on an oscilloscope. Measure the low interval between actual output edges while also locating both capacitor-level crossings. Their difference can expose switching delays; the capacitor formula alone does not specify a real device's minimum pulse duration.

Periodic RC pulse-train baseline ( $V_{b} / V_{0} = β (1 - α) / (1 - α β)$ )

A periodic RC pulse-train baseline is the repeatable pre-pulse capacitor voltage reached after startup. It need not be zero even when the input low level is zero. With high duration

T

, low duration

D

, period

P = T + D

, and

α = e^{- T / τ}

β = e^{- D / τ}

, the recurrence in residual baseline in RC pulse-width discrimination has contraction factor

q = α β = e^{- P / τ}

. Its fixed baseline and peak are

b_{*} = V_{0} \frac{β ( 1 - α )}{1 - α β}, v_{p, *} = V_{0} \frac{1 - α}{1 - α β}, b_{n} - b_{*} = q^{n} (b_{0} - b_{*}) .

This is a deterministic periodic state, not a random noise floor. The startup error is reduced by a specified fraction

η

after

n \geq (τ / P) lo g (1/ η)

cycles, rounded upward.

The mean supplies an independent check. Integrating

τ \overset{v}{˙} + v = u

over a full period makes the derivative term vanish, so

⟨ v ⟩ = ⟨ u ⟩ = (T / P) V_{0}

. The mean depends on duty cycle while the baseline and ripple depend on period relative to the time constant. For

P ≪ τ

at fixed

r = T / P

, expansion gives

\frac{b _{*}}{V _{0}} = r - \frac{r ( 1 - r )}{2} \frac{P}{τ} + O ((P / τ)^{2}), \frac{v _{p, *}}{V _{0}} = r + \frac{r ( 1 - r )}{2} \frac{P}{τ} + O ((P / τ)^{2}) .

Thus a rapid train approaches a level near its duty-cycle average, rather than isolated relaxed pulses.

For an original fast-train example, choose

V_{0} = 1 V

τ = 1 ms

P = 0.20 ms

and

r = 0.30

. The exact baseline is about

0.27929 V

, the peak

0.32127 V

, and the mean exactly

0.30 V

. The startup deviation contracts by

e^{- 0.2}

each cycle; reducing it below one percent of its initial value takes 24 cycles, or

4.8 ms

A pulse-generator/oscilloscope test should therefore distinguish the first pulses from the repeatable train, and record minima, maxima and mean rather than only input width. The natural-response measurement in the primary RC laboratory checks the time constant used here.^[ref] Threshold placement relative to the repeatable minimum and maximum determines acceptance and missing comparator reset in an RC pulse train.

Threshold timing sensitivity of an RC step response ( $\partial t_{↑} / \partial V_{th} = τ / (V_{0} - V_{th})$ )

Threshold timing sensitivity of an RC step response measures how a crossing time changes when the absolute threshold or signal height changes. For a relaxed step response

v (t) = V_{0} (1 - e^{- t / τ})

, with

0 < V_{th} < V_{0}

, the rising crossing is

t_{↑} = τ lo g \frac{V _{0}}{V _{0} - V _{th}} .

Holding the other inputs fixed gives

\frac{\partial t _{↑}}{\partial V _{th}} = \frac{τ}{V _{0} - V _{th}}, \frac{\partial t _{↑}}{\partial V _{0}} = - \frac{τ V _{th}}{V _{0} ( V _{0} - V _{th} )}, \frac{\partial t _{↑}}{\partial τ} = \frac{t _{↑}}{τ} .

A threshold approaching the step height encounters a flatter part of the exponential response, making the first sensitivity large.

For an original timing estimate, choose

V_{0} = 2 V

τ = 0.5 μ s

, and effective small threshold-noise standard deviation

4 mV

. At

V_{th} = 0.4 V

, local linear propagation gives timing standard deviation about

1.25 ns

. At

1.9 V

, it gives about

20 ns

. The latter threshold also needs a longer input pulse to be reached at all, as shown in threshold-crossing time of a finite rectangular pulse through an RC load.

The two voltage sensitivities can cancel under a different measurement calibration model. If the threshold is set to a fixed fraction

a

of the same varying height,

d V_{th} = a d V_{0}

and

V_{th} = a V_{0}

, their contributions sum to zero. The crossing becomes

- τ lo g (1 - a)

, independent of amplitude in this ideal model. Such correlated threshold and amplitude errors in RC timing must retain covariance rather than add two independent voltage uncertainties.^[ref]

The local noise rule also follows from dividing a small voltage perturbation by the crossing slope

(V_{0} - V_{th}) / τ

. It assumes a well-defined nearby crossing and sufficiently small perturbations; it does not describe multiple noise crossings, comparator switching dynamics, or a pulse ending before the threshold. A bench test can compare controlled threshold shifts with oscilloscope crossing times while holding the actual step height and initial state fixed.

Correlated threshold and amplitude errors in RC timing ( $u_{t}^{2} \approx J Σ J^{T}$ )

Correlated threshold and amplitude errors in RC timing must be propagated together. An input level and a comparator threshold can share a reference, so treating their measurement uncertainties as independent can overestimate or underestimate the uncertainty of the RC threshold-crossing time. The correct cancellation depends on which levels share an error, including the initial baseline.

First hold the time constant

τ

fixed and take a known zero initial output. Write

H > 0

for the step's high level and

0 < θ < H

for the threshold. The RC threshold-crossing time and its two sensitivity coefficients are

t = τ lo g \frac{H}{H - θ}, c_{θ} = \frac{τ}{H - θ}, c_{H} = - \frac{τ θ}{H ( H - θ )} = - a c_{θ}, a = θ / H .

The first-order law of propagation of uncertainty retains the covariance term. If the two input standard uncertainties are

u_{θ}, u_{H}

, and their correlation coefficient is

ρ

, then

u_{t}^{2} \approx (\frac{τ}{H - θ})^{2} (u_{θ}^{2} + a^{2} u_{H}^{2} - 2 a ρ u_{θ} u_{H}) .

The negative cross term follows from the opposite signs of the two sensitivities: raising the threshold delays a crossing, whereas raising the input makes it earlier. Setting covariance to zero is an assumption about the measurement process.^[ref]

For an original example, let

H = 1 V

θ = 0.50 V

τ = 1 μ s

u_{H} = 20 mV

and

u_{θ} = 10 mV

. The nominal crossing is

0.69315 μ s

, and

u_{t} \approx 28.284 1 - ρ ns .

If the two errors are independent random variables, the result is

28.28 ns

;

ρ = 0.9

gives

8.94 ns

; perfect anticorrelation gives

40.00 ns

. These are standard uncertainties from a local approximation, not automatically coverage intervals.

There is an exact cancellation under a more specific model. With zero baseline, if

H = G H_{0}

and

θ = G θ_{0}

with the same positive gain

G

, the ratio

a

is fixed and

t = τ lo g \frac{G H _{0}}{G ( H _{0} - θ _{0} )} = τ lo g \frac{H _{0}}{H _{0} - θ _{0}} .

This ratiometric cancellation of RC timing gain errors is a ratiometric measurement principle. With

u_{θ} = a u_{H}

, the zero at

ρ = 1

reflects exact common scaling, rather than a claim that every source of timing uncertainty has vanished. Uncertainty in

τ

, for example, still gives

u_{t} / t \approx u_{τ} / τ

A common offset in RC timing needs the baseline to be specified. If the initial output remains fixed at zero while only

H

and

θ

receive the same offset

B

, then

t (B) = τ lo g \frac{H _{0} + B}{H _{0} - θ _{0}}, \frac{d t}{d B}_{B = 0} = \frac{τ}{H _{0}} .

In the numerical example, a small shared offset with standard uncertainty

10 mV

gives about

10 ns

of timing uncertainty. Perfect positive correlation between these two levels alone does not ensure cancellation.

If the baseline shares the offset too, it must be included. The nonzero-baseline model from residual baseline in RC pulse-width discrimination is

t (H, θ, V_{b}) = τ lo g \frac{H - V _{b}}{H - θ} .

(6)

Adding

B

to all three levels leaves both differences, and hence the time, unchanged. This is a change of common zero reference. Holding the baseline fixed while shifting only the two other levels is a different experiment. The extra sensitivity is

c_{b} = - τ / (H - V_{b})

; at

V_{b} = 0

, the three voltage sensitivities sum to zero, as required by the exact common-offset invariance.

Figure 1.
Covariance changes RC timing uncertainty, while gain and offset cancellation depend on the full measurement model
. Original calculation for a 1 V high level, 0.5 V threshold and 1 µs time constant. Exact four-state bounded-error checks are compared with first-order propagation. The right panel distinguishes common gain, a two-level offset with fixed baseline, and a common offset of all three levels. Its common perturbation $ϵ$ sets gain $G = 1 + ϵ$ or offset $B = ϵ H_{0}$ . No measured uncertainty data are used. **Details**.

An exact numerical check can use bounded errors with prescribed correlation. Take two independent random variables

Z, W

with the Rademacher distribution and set

δH = u_{H} Z, δ θ = u_{θ} (ρZ + 1 - ρ^{2} W) .

(7)

The four equally likely states have the specified variances and covariance. At the chosen error scales, all states retain

0 < θ < H

, so the exact logarithmic crossing exists in every state. Evaluating those four times checks the local approximation without silently assigning a crossing to an invalid input pair. Near a threshold or pulse-duration boundary, missing crossings and nonlinear effects require separate treatment.

For a full measurement uncertainty calculation, include the baseline and time constant when their uncertainties matter. With input vector

(θ, H, V_{b}, τ)

, Jacobian matrix

J

and covariance matrix

Σ

, the first-order result is

u_{t}^{2} \approx J Σ J^{T}

. The measurement model must represent significant corrections and uncertainty sources, rather than only a physical law.^[ref] A bench check can vary a common amplitude reference and then an independent threshold offset while recording actual levels and crossings on an oscilloscope; the baseline should be recorded in both tests.

Common offset in RC timing ( $t (H + B, θ + B, V_{b} + B) = t (H, θ, V_{b})$ )

A common offset in RC timing cancels only when every level used in the crossing model shares the same additive change. For high level

H

, threshold

θ

, and initial baseline

V_{b}

, assume

V_{b} < θ < H

and fixed time constant

τ

. The crossing time is

t (H, θ, V_{b}) = τ lo g \frac{H - V _{b}}{H - θ} .

Adding

B

to all three levels leaves both differences unchanged, so the invariance in the header is exact. It describes a shared readout zero, or an equivalently translated step with a translated initial condition, rather than every possible physical offset experiment.

The three sensitivities make the cancellation visible locally:

c_{H} = τ (\frac{1}{H - V _{b}} - \frac{1}{H - θ}), c_{θ} = \frac{τ}{H - θ}, c_{b} = - \frac{τ}{H - V _{b}}, c_{H} + c_{θ} + c_{b} = 0.

A common random offset has covariance matrix

u_{B}^{2} 1 1^{T}

for these three inputs and contributes zero to the propagated timing variance. NIST's primary law retains exactly such covariance terms; setting them to zero would represent another measurement model.^[ref]

For an original nonzero-baseline example, take

H = 2 V

θ = 0.8 V

V_{b} = 0.2 V

and

τ = 0.6 μ s

. The crossing is about

0.243279 μ s

. Adding

20 mV

to all three levels leaves it exactly unchanged. Adding the same offset only to

H

and

θ

while keeping the baseline fixed instead increases it by about

6.630 ns

. The two-level sensitivity is

c_{H} + c_{θ} = τ / (H - V_{b})

, predicting

6.667 ns

to first order.

A calibration test must state whether the initial capacitor output, electronic comparator reference, input level and readout share the offset. Independent threshold errors, uncertainty of the time constant, and baseline memory remain even when this one common component cancels. The full distinction is developed in correlated threshold and amplitude errors in RC timing; a common gain is a separate invariance treated in ratiometric cancellation of RC timing gain errors.

Ratiometric cancellation of RC timing gain errors ( $t (G H, Gθ) = t (H, θ)$ )

Ratiometric cancellation of RC timing gain errors follows when the same positive gain multiplies every voltage level relevant to a threshold ratio. With zero initial baseline, fixed time constant

τ

, high level

H > 0

and threshold

0 < θ < H

t = τ lo g \frac{H}{H - θ} = - τ lo g (1 - a), a = θ / H .

Replacing

H, θ

G H, Gθ

with

G > 0

leaves

a

and the time unchanged. This is an exact invariance, not merely the first-order cancellation of two uncertainty terms. It is a ratiometric measurement property of the specified model.

For an original example, choose

H = 2 V

θ = 0.6 V

and

τ = 0.8 μ s

. The crossing is approximately

0.285340 μ s

. Gains

G = 0.8

and

G = 1.2

both give the same result when they scale high level and threshold together. A shared readout gain can cancel from the calculated time in the same way; whether a reference also changes the physical circuit must be stated separately.

The mismatch remaining after common RC gain cancellation depends on the relative gains, not their common magnitude. Let the high level use gain

G_{H}

and the threshold gain

G_{θ}

, with

G_{θ} / G_{H} = 1 + ϵ

. Provided

0 < a (1 + ϵ) < 1

Δ t = - τ lo g (1 - \frac{a ϵ}{1 - a}) \approx \frac{τ a}{1 - a} ϵ .

In the example, a one-percent relative mismatch delays the crossing by about

3.436 ns

, compared with

3.429 ns

from the first-order expression. Thresholds nearer the high level amplify the residual.

A nonzero initial baseline must share the gain too:

t = τ lo g [(H - V_{b}) / (H - θ)]

is unchanged by multiplying all three levels by

G

. Scaling only the high level and threshold against a fixed nonzero baseline is another experiment. Likewise, additive errors follow the conditions in common offset in RC timing, not the two-level scaling rule.

Uncertainty in the time constant, independent threshold error, baseline memory, and failure to reach the threshold remain even when one common gain cancels. Their covariance structure must follow the complete measurement model, as in correlated threshold and amplitude errors in RC timing and NIST's propagation law.^[ref]

Mismatch remaining after common RC gain cancellation

The mismatch remaining after common RC gain cancellation is the timing error caused by unequal gains in the amplitude and threshold paths after their common multiplicative part has canceled. It depends on their ratio, so improving a shared gain alone does not remove it.

For the zero-baseline RC threshold-crossing time, let

a = θ / H

with

0 < a < 1

. If the amplitude is multiplied by

G_{H} > 0

and the threshold by

G_{θ} > 0

, define the residual relative error by

G_{θ} / G_{H} = 1 + ϵ

. The exact result from ratiometric cancellation of RC timing gain errors is

Δ t = - τ lo g (1 - \frac{a ϵ}{1 - a}), 0 < a (1 + ϵ) < 1.

Here

τ

is the time constant. As

a (1 + ϵ)

approaches one, the crossing is arbitrarily late; at or above one there is no finite rising crossing. An error budget must check this existence condition as well as a small timing residual.

For a new example, set

H = 1 V

θ = 0.8 V

and

τ = 1 μ s

. A one-percent positive mismatch gives

Δ t = - lo g (0.96) μ s \approx 40.822 ns

; a one-percent negative mismatch gives

- lo g (1.04) μ s \approx - 39.221 ns

. The first-order estimate is

Δ t ≃ τ a ϵ / (1 - a)

, or

\pm 40 ns

here. The unequal exact magnitudes are a consequence of the logarithm, not an asymmetric tolerance specification.

∣ ϵ ∣ \leq e < (1 - a) / a

, monotonicity gives the exact worst absolute error

∣Δ t ∣ \leq - τ lo g (1 - \frac{a e}{1 - a}) .

Thus a

10 ns

bound in this example requires

e \leq (1 - a) (1 - e^{- 0.01}) / a \approx 0.00248754

, about

0.249%

. This is a bound on the gain ratio, not on either gain separately.

For small fractional path errors

η_{H}, η_{θ}

ϵ ≃ η_{θ} - η_{H}

and

Var (ϵ) ≃ u_{θ}^{2} + u_{H}^{2} - 2 Cov (η_{θ}, η_{H}) .

A perfectly shared component has zero contribution to that difference. This is the law of propagation of uncertainty applied to the two gains; it does not cancel a change in

τ

, an additive threshold error or a nonzero unscaled baseline.^[ref]

A proposed check varies the common gain while holding its ratio fixed, then varies only one path. Recording the two electric potential differences and the crossing on an oscilloscope distinguishes the exact common-gain invariance from the surviving mismatch.

Time above threshold for an RC-filtered rectangular pulse ( $W = t_{↓} - t_{↑}$ )

The time above threshold for an RC-filtered rectangular pulse is the separation of its rising and falling threshold crossings, rather than the applied pulse duration. In the relaxed first-order model, put

a = V_{th} / V_{0}

with

0 < a < 1

and

T > T_{m i n} = - τ lo g (1 - a)

. The parent crossing calculation gives

W = T + τ lo g \frac{( 1 - e ^{- T / τ} ) ( 1 - a )}{a} .

This excludes comparator propagation dynamics and uses the same threshold on both edges. A Schmitt trigger with unequal switching thresholds needs a different formula.

The positive-width relation can be inverted exactly:

\frac{W}{τ} = lo g (e^{T / τ} - 1) + lo g \frac{1 - a}{a}, T = τ lo g (1 + \frac{a}{1 - a} e^{W / τ}) .

Its derivative is

d W / d T = 1/ (1 - e^{- T / τ}) > 1

. Thus a measured positive

W

determines a unique input duration under the stated model. A zero-width observation does not: all rejected durations

T \leq T_{m i n}

have that same outcome.

For an original example, take

a = 0.25

τ = 1 μ s

and

T = 2 μ s

. The output remains above threshold for about

2.9532 μ s

, longer than the input pulse because of its decaying tail. Substitution into the inverse relation recovers

2 μ s

For long pulses,

W - T

tends to

τ lo g [(1 - a) / a]

. It is positive below a half-height threshold and negative above one. At exactly half height,

W < T

for every finite accepted pulse, with the difference tending to zero for long pulses. Consequently a measured above-threshold width cannot be equated to the input width without the threshold and filter model.

A pulse-generator/oscilloscope comparison can record both widths while varying threshold. The measured RC decay should be checked independently, using the natural-response method in the primary MIT laboratory.^[ref] Initial residual charge, hysteresis, and different rising/falling comparator delays alter the observation; the algebra above only inverts the ideal capacitor waveform.

Current gain ( $A_{i} = i_{out} / i_{in}$ )

The ratio of output to input signal electric current, with specified reference directions and load conditions. A large current gain alone does not determine power gain.

Power gain ( $G_{P} = P_{out} / P_{in}$ )

The ratio of signal power delivered to a specified output load to signal power accepted at a specified input, with

P_{in} > 0

. An amplifier draws additional energy from its supply, so a power gain above one does not create energy.

Lock-in amplifier

A lock-in amplifier measures the component of an input signal synchronized with a reference at a chosen frequency. It multiplies the input by a reference sinusoid, then uses a low-pass filter to retain the slowly varying product. Two references in phase quadrature recover both amplitude and phase difference. A shared timing source keeps the relative wave phase stable: this is coherent detection.^[ref]

The useful trick is to move the wanted frequency to zero before averaging. An electronic amplifier alone enlarges both the wanted signal and unwanted noise; a lock-in amplifier instead selects a component by its timing. A photodiode's electric current can first be converted to an electric potential difference, so the same calculation can measure weak modulated light. The chopped-light lock-in experiment makes this selection tangible.

Phase-sensitive detection ( $X = A cos ϕ, Y = A sin ϕ$ )

phase-sensitive detection correlates an input with a synchronized reference and filters the product. Sinusoidal quadrature references recover both signal amplitude and relative phase. Narrow detection bandwidth rejects incoherent noise but cannot reject a background coherent at the same frequency; changing the integration time also changes settling and tracking speed.^[ref]

Lock-in quadratures ( $X = A cos ϕ, Y = A sin ϕ$ )

Let the input electric potential difference be

s (t) = A cos (ω t + ϕ)

, with peak amplitude

A \geq 0

, angular frequency

ω > 0

, and phase difference

ϕ

relative to

cos ω t

. For an observation interval

[0, T]

containing an integer number

N \geq 1

of cycles, each lasting one period of a function,

T = 2 π N / ω

, define the lock-in quadratures in a peak convention:

X = \frac{2}{T} \int_{0}^{T} s (t) cos ω t d t, Y = - \frac{2}{T} \int_{0}^{T} s (t) sin ω t d t .

These integrals average the products with dimensionless references

2 cos ω t

and

- 2 sin ω t

;

X

and

Y

have the input's units. The minus sign makes positive

ϕ

give positive

Y

. The trigonometric functions give

2 s (t) cos ω t - 2 s (t) sin ω t = A cos ϕ + A cos (2 ω t + ϕ), = A sin ϕ - A sin (2 ω t + ϕ) .

The oscillating terms have zero integral over the stated interval, proving

X = A cos ϕ

and

Y = A sin ϕ

. Their orthogonality turns an oscillating signal into two constant coordinates.

Represent those coordinates as a vector, or as the complex number

Z = X + i Y

. Its modulus and complex argument recover the peak amplitude and phase difference:

R = X^{2} + Y^{2} = A, ϕ = atan2 (Y, X) (mod 2 π), R > 0.

Here

atan2 (Y, X)

selects the angle with the correct signs of both coordinates, rather than applying the arctangent to

Y / X

and losing the quadrant. When

X = Y = 0

, the amplitude is zero and the phase difference is undefined. When

ϕ = π /2

X = 0

despite a nonzero signal; measuring

Y

prevents this blind spot. Rotating both references by a fixed angle rotates the coordinate vector but preserves

R

The factors of two above deliberately recover peak amplitude. The SR830 instead reports the selected sinusoidal component in root mean square units: in a calibrated, zero-offset display,

R_{rms} = R / 2

. For

R = 0.4 V

this is

0.282843 V

, while the peak-to-peak span of that component is

0.8 V

. Display normalization, reference sign, gain and angle units must be checked for the particular instrument.^[ref]

Lock-in harmonic rejection

Consider this original constructed input electric potential difference, with

t

in seconds and

f_{0} = 1 Hz

s (t) = (0.4 V) cos (2 π f_{0} t + π /3) + (0.9 V) cos (6 π f_{0} t + π /5) .

The unwanted component has three times the reference frequency and more than twice the wanted peak amplitude. Nevertheless, the lock-in quadratures over

T = 4/ f_{0} = 4 s

are exactly

X = 0.4 cos (π /3) V = 0.2 V, Y = 0.4 sin (π /3) V = 0.2 3 V \approx 0.34641016 V,

R = 0.4 V

and

atan2 (Y, X) = π /3 = 6 0^{\circ}

. This is a peak amplitude calculation, not an SR830 display prediction.

To see why the larger component vanishes, multiply

B cos (3 ω t + ψ)

by each reference:

2 B cos (3 ω t + ψ) cos ω t - 2 B cos (3 ω t + ψ) sin ω t = B cos (2 ω t + ψ) + B cos (4 ω t + ψ), = B sin (2 ω t + ψ) - B sin (4 ω t + ψ) .

Each sinusoid has zero average value of a function over a whole reference cycle. More generally, a component

B cos (nω t + ψ)

with integer

n \geq 2

gives products at

(n - 1) ω

and

(n + 1) ω

, whose integrals vanish over any integer number of reference cycles. This is the orthogonality behind selecting a Fourier coefficient with sinusoidal references. A nonsinusoidal reference can contain additional frequencies and need not have the same rejection property.

Figure 1.
Lock-in harmonic rejection: multiplication reveals a constant component
. Original calculated waveforms for the declared $0.4 V$ wanted component and $0.9 V$ interference; no measured data. Top: input and wanted signal. Middle: products with the two dimensionless references. Bottom: running lock-in quadratures; markers at complete reference cycles equal $X = 0.2 V$ , $Y = 0.2 3 V$ . Partial-cycle estimates need not equal those values. **Details**.

An unwanted component at the reference frequency survives. If

u (t) = B cos (ω t + ψ)

is added to the input, its coordinate vector adds to the wanted one:

Z = A e^{i ϕ} + B e^{i ψ} .

For example, adding

B = 0.1 V

with

ψ = 0

to the wanted component gives

X = 0.3 V

Y = 0.2 3 V

R = 0.21 V \approx 0.458258 V

, and phase difference

atan2 (0.2 3, 0.3) \approx 49.106 6^{\circ}

. Longer averaging cannot separate these two synchronized contributions.

Finite-window lock-in response ( $F_{T} (ν) = e^{i ν T /2} sinc (ν T /2)$ )

An observation interval of finite duration is not an infinitely sharp frequency selector. Combine the lock-in quadratures into

Z_{T} = \frac{2}{T} \int_{0}^{T} s (t) e^{- i ω t} d t .

For unwanted electric potential difference

s (t) = B cos ((ω + δ) t + ψ)

, where

δ

is an angular frequency offset and

ω + δ > 0

, expansion into complex exponentials gives the exact response

Z_{T} F_{T} (ν) sinc (x) = B e^{i ψ} F_{T} (δ) + B e^{- i ψ} F_{T} (- (2 ω + δ)), = \frac{1}{T} \int_{0}^{T} e^{i ν t} d t = e^{i ν T /2} sinc (ν T /2), = {sin x / x, 1, x \neq = 0, x = 0.

The sinc function formula follows by integrating the exponential function and factoring

e^{i ν T} - 1 = 2 i e^{i ν T /2} sin (ν T /2)

; its value at zero follows from a limit. The first term changes slowly after multiplication; the second oscillates at the sum frequency. It vanishes at exact matching when

T

is an integer number of reference cycles, each lasting one period of a function, but cannot generally be discarded in a short-window calculation.

For

∣ δ ∣ ≪ ω

and many reference cycles, the first term usually dominates: its modulus is

B ∣ sinc (δ T /2) ∣

and its complex argument includes

δ T /2

. Thus

∣ δ ∣ T ≪ 1

gives almost no rejection. A longer observation separates closer frequencies, with the first zeros of this term at

∣ δ ∣ = 2 π / T

. Those zeros are not a brick-wall cutoff: the sinc function has nonzero lobes beyond them. At

δ = 0

a synchronized contribution remains however large

T

becomes.

Figure 1.
Lock-in quadratures preserve phase difference; a finite interval limits rejection
. Original calculated geometry and responses, not measurements. Left: $X = 0.2 V$ , $Y = 0.2 3 V$ , $R = 0.4 V$ , $ϕ = 6 0^{\circ}$ ; the dotted vector shows an added synchronized $0.1 V$ contribution. Right: exact $∣ Z_{T} ∣/ B$ for $ψ = 0$ and $T$ equal to four reference cycles, against dimensionless detuning $(f - f_{0}) T$ . The dashed curve keeps only the difference-frequency term. Their difference shows why the sum-frequency term matters for a short observation. **Details**.

For a numerical check, use

f_{0} = 1 Hz

T = 4 s

ψ = 0

and an unwanted frequency

f = 1.125 Hz

. Then

(f - f_{0}) T = 1/2

and the exact expression gives

\frac{∣ Z _{T} ∣}{B} = \frac{2}{π} - \frac{2}{17 π} = \frac{32}{17 π} \approx 0.599172,

whereas the difference-frequency term alone gives

2/ π \approx 0.636620

. An interference amplitude

B = 0.9 V

therefore contributes

0.539254 V

∣ Z_{T} ∣

in this constructed example. A nearby frequency can survive strongly even though the three-times-frequency component in lock-in harmonic rejection cancels exactly.

Chopped-light lock-in experiment

The University of California, Berkeley guide LLS - Measuring the Light Signal from a Diode, in Experimental Setup and Experiments X–XI, documents an experiment using a red light-emitting diode amid room-light background. An optical chopper, controlled by an SR540, periodically interrupts its light. A PIN-10DP photodiode sends electric current to an SR570 preamplifier, which converts it to an electric potential difference for an SR760 spectrum analyzer and an SR830 lock-in amplifier. The SR540 supplies the external reference. Preparation includes aligning the photodiode and its shielding cone and choosing gain to avoid overload. One comparison first searches for the source frequency without the chopper reference, then checks against that external reference; switching off the LED tests the candidate spectral peak. The measurement procedure varies chopper frequency and preamplifier filtering, then records repeated lock-in readings with selected averaging settings. These are prescribed observations to make, not published numerical results.^[ref]

The guide notes nearly triangular chopping because slit and emitter sizes are comparable. Its interpretation requires detector conversion, preamplifier gain and waveform geometry to infer optical power from the selected component.^[ref]

The inference is therefore specific: synchronized electric potential difference supports the presence of a modulated optical component at the reference frequency. It does not by itself give total emitted optical power. The photodiode's spectral responsivity, collected fraction of the light, and conversion from the measured Fourier coefficient to the chopped waveform must enter that calibration. The finite-window lock-in response also explains why a frequency-search reading can drift when the reference is not synchronized. An LED-off comparison tests background at the same timing; it cannot guarantee that every synchronized disturbance disappears when the desired source is present. Overload before multiplication destroys information that later averaging cannot restore.

Transimpedance amplifier