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Impedance bridging with capacitive input treats a receiver's input as a resistance in parallel with a capacitance. Even when its DC input impedance is large, the capacitive path can draw appreciable electric current at higher frequency, changing both the amplitude and phase of the observed electric potential difference.

For source resistance $R_s$, receiving resistance $R_{\mathrm{in}}$ and input capacitance $C_{\mathrm{in}}$, use sinusoidal steady-state phasors and a linear source model. The receiving electrical admittance is $1/R_{\mathrm{in}}+\mathrm{i}\omega C_{\mathrm{in}}$, soHere $V_s$ is the open-circuit source phasor; $V_L$ is the loaded terminal phasor. The impedance bridging objective is $H$ near one, rather than merely a large quoted DC input resistance.

The amplitude and phase responses areAn amplitude-only tolerance and a tolerance on the full complex number express different requirements. The latter measuresFor positive resistances, capacitance and a chosen $0<\eta <1$, the capacitive bridging complex-error bandwidth condition $|1-H|\le \eta$ requiresA negative numerator means even the DC loading error exceeds the tolerance.

In an original example, $R_s=1\mathrm{k\Omega }$, $R_{\mathrm{in}}=1\mathrm{M\Omega }$ and $C_{\mathrm{in}}=100\mathrm{pF}$ give $g=0.001$. A one-percent complex-error tolerance permits frequencies only up to about $15.9\mathrm{kHz}$. At $100\mathrm{kHz}$ the amplitude ratio remains about $0.997$, but the phase is about $-3.59^{\circ }$ and the complex error about $0.0627$. A small amplitude error can coexist with a materially larger waveform-phase error.

High-input-impedance buffers are motivated by just this source-loading problem. Texas Instruments' three-amplifier presentation shows how current drawn from a source with finite output impedance degrades accuracy and how input buffers reduce loading.^[ref] The chosen component values above are not specifications of a particular amplifier. A real receiver may require additional input paths, frequency-dependent source impedance and a model of the connected cable or probe.

A voltage gain determines a power gain only when the electrical conditions at both ports are included. The familiar equality between $20{\log }_{10}|A_v|$ and $10{\log }_{10}{G}_P$ requires a particular impedance relation; it is not a conversion between arbitrary voltage and power ratios.

Use phasors whose moduli are root mean square amplitudes, at one sinusoidal frequency. At a load with electrical impedance $Z$ and electrical admittance $Y=1/Z$, the current is $I=YV$. Its complex electrical power is $V{I}^{\ast }$, with the complex conjugate arising from the relative phase of the two sinusoids. Averaging $v(t)i(t)$ over a cycle gives the active powerTo see the averaging step, write $v(t)=\sqrt{2}|V|\cos (\omega t+{\varphi }_V)$ and similarly for $i(t)$. The product's cycle average is $|V||I|\cos ({\varphi }_V-{\varphi }_I)$, the real part of $V{I}^{\ast }$. Peak-amplitude phasors instead require an extra factor $1/2$.

Let $Y_{\mathrm{in}}$ describe the actual input impedance and $Y_L$ the actual load impedance. Take $\mathrm{Re}{Y}_{\mathrm{in}}>0$ and $\mathrm{Re}{Y}_L>0$ with nonzero terminal signals, and define currents into the amplifier at the input and into the load at the output. With the measured loaded voltage gain $A_v=V_L/V_{\mathrm{in}}$,Thus $G_P=|A_v{|}^2$ requires equality of the relevant electrical conductances, not merely equality of impedance moduli. For example, input $Z_{\mathrm{in}}=50\Omega$ and load $Z_L=(30+40i)\Omega$ both have modulus $50\Omega$, but their electrical admittances have real parts $0.020$ and $0.012\mathrm{S}$. The multiplier is $0.6$, so $G_P=0.6|A_v{|}^2$.

For real resistive ports this becomesTake an original example with measured $|A_v|=0.5$, $R_{\mathrm{in}}=10\mathrm{k\Omega }$ and $R_L=50\Omega$. The voltage gain is $-6.02\mathrm{dB}$, while the power gain is $50$, or $16.99\mathrm{dB}$. An active buffer can reduce the signal's electric potential difference while delivering more signal power than it accepts at its input; the supply provides the additional energy.

The amplifier's output impedance is distinct from the connected load impedance. To show why that distinction matters, model its output by a Thévenin equivalent with open-circuit voltage $A_0{V}_{\mathrm{in}}$ and series resistance $R_o$. The voltage divider givesWith $A_0=0.6$ and $R_o=10\Omega$, the $50\Omega$ load produces the preceding $A_v=0.5$ example. Differentiating $R_L/(R_o+R_L{)}^2$ gives $(R_o-R_L)/(R_o+R_L{)}^3$, so delivered power is largest at $R_L=R_o$, as in the maximum power transfer theorem. Here its power gain is $90$. Increasing $R_L$ much further makes $A_v$ approach $A_0$ but reduces delivered power. That high-load-impedance regime is impedance bridging, useful for sensing the source's voltage with little loading.

A bench demonstration uses a function generator, a known termination and an oscilloscope. The Keysight guide explains that an expected-load setting changes how amplitude is displayed for generators with a fixed series output impedance; a high-impedance load can receive twice the voltage expected for a matched $50\Omega$ termination.^[ref] As an independent low-frequency resistive calculation, an open-circuit source of $1\mathrm{V}$ root mean square with $50\Omega$ series resistance delivers $0.5\mathrm{V}$ and $5\mathrm{mW}$ to $50\Omega$. Into $1\mathrm{M\Omega }$ it delivers about $0.99995\mathrm{V}$ but only $1.00\mu \mathrm{W}$. The larger terminal reading accompanies much less delivered power. Specify the actual load, frequency and amplitude convention when comparing gain measurements.

The load impedance $Z_L$ is the terminal electrical impedance of the receiving electrical load, at a stated frequency and operating condition. With electric current defined as entering the load's positive-voltage terminal, sinusoidal steady-state phasors obeyThe complex number records both the amplitude ratio and the phase difference. It belongs to the selected terminals and model; an arbitrary nonlinear device need not have a single amplitude-independent impedance.

A resistor gives $Z_L=R$. A series resistor and capacitor giveFor $R=1\mathrm{k\Omega }$, $C=1\mu \mathrm{F}$ and $f=1\mathrm{kHz}$, this is about $(1000-159.15\mathrm{i})\Omega$, with magnitude $1012.59\Omega$ and phase $-9.04^{\circ }$. Load electric current leads its terminal electric potential difference in this example. The component laws and phasor interpretation follow the sinusoidal circuit model.^[ref]

The load changes the source's operating point. A source with open-circuit phasor $V_s$ and series impedance $Z_s$ suppliesFor RMS phasors, the complex power entering the load is $S_L=V_L{I}_L^{\ast }$. Its real part is the mean delivered power,Using peak rather than RMS amplitudes would introduce a factor $1/2$ in that power expression.

An original resistive example has $V_s=1\mathrm{V}$ RMS and $R_s=1\mathrm{k\Omega }$. A $9\mathrm{k\Omega }$ load draws $0.100\mathrm{mA}$, receives $0.900\mathrm{V}$ and dissipates $0.090\mathrm{mW}$. A $1\mathrm{k\Omega }$ load instead receives $0.500\mathrm{V}$ and dissipates $0.250\mathrm{mW}$. More delivered power need not mean a smaller voltage error.

The input impedance of an instrument is a load when the instrument is connected to a source. High-input-impedance buffering reduces this interaction in voltage measurements.^[ref] Impedance bridging prioritizes preserving the source signal; impedance matching addresses other objectives such as maximum power transfer under its assumptions.