Define the phase difference as current phase minus voltage phase. Since ,
(1)
It decreases continuously from at low frequency, through zero at , to at high frequency. Thus the current leads in the capacitive limit and lags in the inductive limit. Defining voltage phase minus current phase would reverse the graph's sign.
Figure 1.
Current phase relative to the source voltage in a series RLC circuit
. The example uses omega_0 L/R equal to one; the limiting phases and zero crossing hold for every positive R, L and C. Details.

Ancestors (11)

  1. 5
  2. 2014
  3. Past exam of the physics 2 paper of the University of Oxford
  4. Physics 2 paper of the University of Oxford
  5. Year 1 of the physics course of the University of Oxford
  6. Physics course of the University of Oxford
  7. Undergraduate course of the University of Oxford
  8. Course of the University of Oxford
  9. University of Oxford
  10. List of universities
  11. Home

View article source

Discussion (0)

New discussion

There are no discussions about this article yet.

Articles by others on the same topic (0)

There are currently no matching articles.
See all articles in the same topic Create my own version