Bitcoin addresses are by convention expressed in Base58, which is a human readable binary-to-text encoding invented by Bitcoin. It is a bit like Base64, but obsessed with eliminating characters that look like one another in popular but stupid fonts like capital "I" and lower case ell "l".
This seems to be one of the earliest strategies used to encode messages.
These messages were originally found with: github.com/cirosantilli/bitcoin-inscription-indexer#payload-size-out-utxo-2vals
The generated text is however rather obfuscated by the limitations of Base58.
The following transactions contain base58 encoded messages on addresses:
- tx 7961b5ae2f053a16d5c589104f87edfabe80fcae185832ea185e7f0cf06c7747 (2011-12-01) is a Lorem ipsum, 7961b5ae2f053a16d5c589104f87edfabe80fcae185832ea185e7f0cf06c7747 is another one:
11Lorem1psumDo1orSitAmetXXXWAEZ6C 11ConsecteturAdipiscingE1itYQHEPM ... - www.blockchain.com/btc/tx/751ff11286a43da5d6cf7da8f5bc736e522bbd698ec03c76c63368e5260667e6 seems to contain a bunch of names. It is very noisy, but feels too much coincidence not not be intentional
1JameLs3Q9enoB7VT3bDc3XYoziRDqW7o6 1NeLLAADSPYk4wvzCbiac362DdTWNqnWxV 1MaRinaQFfRbEDoz5FvDaJoST1PsqQQhL7 1DioNTe4eHexc74CPPCwJMGPHaDE8za4BM - www.blockchain.com/btc/tx/ace9524519577138ca98ec01651758fd1e5ec33ce0110c6681eccba0e716cc7a is also possible,
11Bitta1ktvchristmasspecia1WNDvAarepeats over an over, so something alongBitta Christmas Special - tx 8ffacbb18f63576fe323cbf2acc6c4c01c86aadf13d8352cfdd39d91916d98c8 (2011-12-05) advertises etchablock.com:so maybe this is the service used to for those base58 encodings. It is down as of 2021, and there are no decent archives unfortunately: web.archive.org/web/20130301000000*/http://etchablock.com/. Some online mentions:
EtchABLockDotComGivesYou BLockChain1mmortaLity- www.reddit.com/r/Bitcoin/comments/s9cra/comment/c4d5x9b/ suggests that the creator is a "Jonathan Ryan Owens". Some profiles:
- www.blockchain.com/btc/tx/028b8514a4f6cc96ac3c1c83dbb117ab9dc5eb09deab7b49bf038fd460173127Source text: en.wikipedia.org/wiki/The_Aristocrats
11TheSetupTheJokeA1waysXXXXTF9Wzp 11BeginsWithAFami1yActGoingY3Q4qw 111nToSeeATa1entAgentThoseXZxb7hQ - www.blockchain.com/btc/tx/89010c791c9d7ed24affa1d638b12179d2ca7ec91704fe906834386f43a8101dSource text: en.wikipedia.org/wiki/United_States_Declaration_of_Independence
11When1nTheCourseofHumanXXXXdfMdQ 11Events1tBecomesNecessaryXYC2rJ5 11ForonePeop1eToDisso1veTheXKXUiD - www.blockchain.com/btc/tx/c99179465b2d3b88fb6ede5d2e42015b15ec641e7a68f18216acaf741723de00Possible source: en.wikipedia.org/wiki/C_data_types
11The1ntegerDataTypesCharXXZZwJAn 11ShortLongAnd1ntCanBeXXXXXVfzLKj 11EitherSignedorUnsignedXXXYMhhUY - www.blockchain.com/btc/tx/3bbd94d22346a3bfb44257293e10c3b5c9ee39230c1cd358bdce2bf03c61ba0b en.wikipedia.org/wiki/Emerald_Tablet
12TisTrueWithoutALie22222221wT3qjn 1CertainAndMostTrue2222222225YPnJF 12ThatWhich1sBe1ow1sAs222221y3G7mv 12ThatWhich1sAboveAnd2222221vxkcEq ... - www.blockchain.com/btc/tx/237b50dac42af130171773b233954e62690182fd4901a453ad5d11d1d54a8ca3 en.wikipedia.org/wiki/The_Glass_Menagerie
11TomAppearsAtTheTopofTheXXWyM2Bt 11A11eyAfterEachSo1emnBoomXaBp7oy 11ofTheBe111nTheTowerHeXXXXVQaies 11ShakesALitt1eNoisemakeroraeWTgK ... - www.blockchain.com/btc/tx/1f9606f267cc398356663b14d1a7a3591e3da06572893394c14975a6fc11798f en.wikipedia.org/wiki/Philosophiæ_Naturalis_Principia_Mathematica
11Ru1e1WeAreToAdmitNoMoreXXazQ96z 11CausesofNatura1ThingsThanZAQ9ig 11SuchAsAreBothTrueAndXXXXXZyzfQp 11SufficientToExp1ainTheirXVSC2gY - tx ef374dcc5b23f16ecb0b1b639ba577d2acda7ad32321b5866db2fa9e6807b9c5 (2011-12-01) contains the intruction from the bitgoin.org website: web.archive.org/web/20210129054851/https://bitcoin.org/en/
11Bitcoin1sADecentra1izedXXWPM6Hs 11PeertopeerNetworkoverXXXXUkyy3M 11WhichUsersMakeXXXXXXXXXXXX4tQgN 11TransactionsThatAreXXXXXXVdZfnJ
Takes two AAA rechargeable batteries.
2021-08: rechargeable battery charges were in, nominal marked 1.2V nickel metal hydride, measured as 1.38V and 1.42V.
But seriously, this is a valuable little list.
The course is basically exclusively about transmons.
The transmon qubit by Leo Di Carlo (2018)
Source. Via QuTech Academy.Circuit QED by Leo Di Carlo (2018)
Source. Via QuTech Academy.Measurements on transmon qubits by Niels Bultink (2018)
Source. Via QuTech Academy. I wish someone would show some actual equipment running! But this is of interest.Single-qubit gate by Brian Taraskinki (2018)
Source. Good video! Basically you make a phase rotation by controlling the envelope of a pulse.Two qubit gates by Adriaan Rol (2018)
Source. Assembling a Quantum Processor by Leo Di Carlo (2018)
Source. Via QuTech Academy.Please refer to Video "Linus Torvalds saying "Nvidia Fuck You" (2012)".
Does not happen every time, only some times. Can't figure out why. Usually happens when has suspended for a longer time.
bugs.launchpad.net/ubuntu/+source/nvidia-graphics-drivers-470/+bug/1946303 sounds like a likely report, Nvidia driver version 470, but can't find those error messages anywhere. The last line of:once was:which is when sleep starts.
journalctl -o short-precise -k -b -1PM: suspend entry (deep)This suggests that it is not a video bug then, seems that it is not waking up at all? Gotta try to SSH into it. OK. I did SSH into it, and that was fine, so it is just the video that won't start.
PM: suspend exitbugs.launchpad.net/ubuntu/+source/linux/+bug/1949977 is another possible bug, based on kernel version. I'm running 5.13, which is one of the failing versions on the report. Can't find any interesting dmesg though.
In another crash:had the following interesting lines:and there was a corresponding
journalctl -o short-precise -k -b -1nvidia-modeset: WARNING: GPU:0: Lost display notification (0:0x00000000); continuing.
[24307.640014] NVRM: GPU at PCI:0000:01:00: GPU-18af74bb-7c72-ff70-e447-87d48378ea20
[24307.640018] NVRM: Xid (PCI:0000:01:00): 79, pid=8828, GPU has fallen off the bus.
[24307.640021] NVRM: GPU 0000:01:00.0: GPU has fallen off the bus.
[24328.054022] nvidia-modeset: ERROR: GPU:0: The requested configuration of display devices (LGD (DP-4)) is not supported on this GPU.
[repeats several more times]
[24328.056767] nvidia-modeset: ERROR: GPU:0: The requested configuration of display devices (LGD (DP-4)) is not supported on this GPU.
[24328.056951] nvidia-modeset: ERROR: GPU:0: Failed to query display engine channel state: 0x0000927c:0:0:0x0000000f
[24328.056955] nvidia-modeset: ERROR: GPU:0: Failed to query display engine channel state: 0x0000927c:1:0:0x0000000f
[24328.056959] nvidia-modeset: ERROR: GPU:0: Failed to query display engine channel state: 0x0000927c:2:0:0x0000000f
[24328.056962] nvidia-modeset: ERROR: GPU:0: Failed to query display engine channel state: 0x0000927c:3:0:0x0000000f
[24328.056983] nvidia-modeset: ERROR: GPU:0: DP-4: Failed to disable DisplayPort audio stream-0
[24328.056992] nvidia-modeset: ERROR: GPU:0: Failed to query display engine channel state: 0x0000947d:0:0:0x0000000f/var/crash/_usr_sbin_gdm3.0.crash.Related "GPU has fallen off the bus": askubuntu.com/questions/868321/gpu-has-fallen-off-the-bus-nvidia
en.wikipedia.org/w/index.php?title=Bo_Ya&oldid=1150295883#The_story_about_Zhiyin:
Bo Ya was good at playing the qin. Zhong Ziqi was good at listening to the qin. When Bo Ya's will was towards high mountains in his playing, Zhong Ziqi would say, "How towering like Mount Tai!" When Bo Ya's will was towards flowing water in his playing, Zhong Ziqi would say, "How vast are the rivers and oceans!" Whatever Bo Ya thought of Ziqi would never fail to understand. Bo Ya said, "Amazing! Your heart and mine are the same!" After Zhong Ziqi died, Bo Ya broke his Guqin because he thought that no one else can understand his music.
Paging is implemented by the CPU hardware itself.
Paging could be implemented in software, but that would be too slow, because every single RAM memory access uses it!
Operating systems must setup and control paging by communicating to the CPU hardware. This is done mostly via:
- the CR3 register, which tells the CPU where the page table is in RAM memory
- writing the correct paging data structures to the RAM pointed to the CR3 register.Using RAM data structures is a common technique when lots of data must be transmitted to the CPU as it would cost too much to have such a large CPU register.The format of the configuration data structures is fixed _by the hardware_, but it is up to the OS to set up and manage those data structures on RAM correctly, and to tell the hardware where to find them (via
cr3).Then some heavy caching is done to ensure that the RAM access will be fast, in particular using the TLB.Another notable example of RAM data structure used by the CPU is the IDT which sets up interrupt handlers.The OS makes it impossible for programs to change the paging setup directly without going through the OS: - CR3 cannot be modified in ring 3. The OS runs in ring 0. See also:
- the page table structures are made invisible to the process using paging itself!
Processes can however make requests to the OS that cause the page tables to be modified, notably:
- stack size changes
brkandmmapcalls, see also: stackoverflow.com/questions/6988487/what-does-brk-system-call-do/31082353#31082353
The kernel then decides if the request will be granted or not in a controlled manner.
The CIA really likes this registrar, e.g.:
- CIA 2010 covert communication websites
- 2014 www.newsweek.com/former-cia-officials-ready-defend-agency-after-torture-reports-release-290383A group of former CIA officials are gearing up to defend the agency when the Senate releases its long-awaited report investigating "enhanced interrogation" tactics used on prisoners after 9/11. The highlight of their PR push will be a website, "CIASAVEDLIVES.COM," which is set to go live when the report is released on Tuesday, Foreign Policy reported.The domain was registered on November 2 under a private registration name, through DomainsByProxy, a company that guards the identity of registrants.
Quantum logic gates are needed because you can't compute the matrix explicitly as it grows exponentially Updated 2025-01-10 +Created 1970-01-01
One key insight, is that the matrix of a non-trivial quantum circuit is going to be huge, and won't fit into any amount classical memory that can be present in this universe.
This is because the matrix is exponential in the number qubits, and is more than the number of atoms in the universe!
Therefore, off the bat we know that we cannot possibly describe those matrices in an explicit form, but rather must use some kind of shorthand.
But it gets worse.
Even if we had enough memory, the act of explicitly computing the matrix is not generally possible.
This is because knowing the matrix, basically means knowing the probability result for all possible outputs for each of the possible inputs.
But if we had those probabilities, our algorithmic problem would already be solved in the first place! We would "just" go over each of those output probabilities (OK, there are of those, which is also an insurmountable problem in itself), and the largest probability would be the answer.
So if we could calculate those probabilities on a classical machine, we would also be able to simulate the quantum computer on the classical machine, and quantum computing would not be able to give exponential speedups, which we know it does.
To see this, consider that for a given input, say and therefore when you multiply it by the unitary matrix of the quantum circuit, what you get is the first column of the unitary matrix of the quantum circuit. And
000 on a 3 qubit machine, the corresponding 8-sized quantum state looks like:000 -> 1000 0000 == (1.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0)001, gives the second column and so on.As a result, to prove that a quantum algorithm is correct, we need to be a bit smarter than "just calculate the full matrix".
Which is why you should now go and read: Section "Quantum algorithm".
This type of thinking links back to how physical experiments relate to quantum computing: a quantum computer realizes a physical experiment to which we cannot calculate the probabilities of outcomes without exponential time.
So for example in the case of a photonic quantum computer, you are not able to calculate from theory the probability that photons will show up on certain wires or not.
The quantum NOT gate swaps the state of and , i.e. it maps:As a result, this gate also inverts the probability of measuring 0 or 1, e.g.
- if the old probability of 0 was 0, then it becomes 1
- if the old probability of 0 was 0.2, then it becomes 0.8
Quantum NOT gate symbol
. Source. 
Appears to be a small section from the Diamond Sutra. TODO find or create a video of it, it is just too awesome.
rm -f tmp.sqlite
sqlite3 tmp.sqlite "create table t (id integer, val integer)"
sqlite3 tmp.sqlite <<EOF
insert into t values
(0, 0),
(1, 5),
(2, 10),
(3, 14),
(4, 15),
(5, 16),
(6, 20),
(7, 25),
(8, 29),
(9, 30),
(10, 30),
(11, 31),
(12, 35),
(13, 40)
EOFShow how many neighbours each column has with Output:
val between val - 2 and val + 2 inclusive:sqlite3 tmp.sqlite <<EOF
SELECT id, val, COUNT(*) OVER (
ORDER BY val RANGE BETWEEN 2 PRECEDING AND 2 FOLLOWING
) FROM t;
EOF0|0|1
1|5|1
2|10|1
3|14|3
4|15|3
5|16|3
6|20|1
7|25|1
8|29|4
9|30|4
10|30|4
11|31|4
12|35|1
13|40|1val - 1 and val + 1 inclusive instead:sqlite3 tmp.sqlite <<EOF
SELECT id, val, COUNT(*) OVER (
ORDER BY val RANGE BETWEEN 1 PRECEDING AND 1 FOLLOWING
) FROM t;
EOF0|0|1
1|5|1
2|10|1
3|14|2
4|15|3
5|16|2
6|20|1
7|25|1
8|29|3
9|30|4
10|30|4
11|31|3
12|35|1
13|40|1There seems to be no analogue to HAVING for window functions, so we can just settle for a subquery for once, e.g.:which outputs:
sqlite3 tmp.sqlite <<EOF
SELECT * FROM (
SELECT id, val, COUNT(*) OVER (
ORDER BY val RANGE BETWEEN 1 PRECEDING AND 1 FOLLOWING
) as c FROM t
) WHERE c > 2
EOF4|15|3
8|29|3
9|30|4
10|30|4
11|31|3Convert virtual addresses to physical from user space with
/proc/<pid>/pagemap and from kernel space with virt_to_phys:Dump all page tables from userspace with
/proc/<pid>/maps and /proc/<pid>/pagemap:Read and write physical addresses from userspace with
/dev/mem:Using the TLB makes translation faster, because the initial translation takes one access _per TLB level_, which means 2 on a simple 32 bit scheme, but 3 or 4 on 64 bit architectures.
The TLB is usually implemented as an expensive type of RAM called content-addressable memory (CAM). CAM implements an associative map on hardware, that is, a structure that given a key (linear address), retrieves a value.
Mappings could also be implemented on RAM addresses, but CAM mappings may required much less entries than a RAM mapping.
For example, a map in which:could be stored in a TLB with 4 entries:
- both keys and values have 20 bits (the case of a simple paging schemes)
- at most 4 values need to be stored at each time
linear physical
------ --------
00000 00001
00001 00010
00010 00011
FFFFF 00000However, to implement this with RAM, _it would be necessary to have 2^20 addresses_:which would be even more expensive than using a TLB.
linear physical
------ --------
00000 00001
00001 00010
00010 00011
... (from 00011 to FFFFE)
FFFFF 00000 Mathematics and Computer Science masters course of the University of Oxford Updated 2025-01-10 +Created 1970-01-01
Corresponding undergrad: Mathematics and Computer science course of the University of Oxford
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