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Analog switch charge injection is charge transferred to a signal node when the switch control changes. Capacitive coupling from the internal control transition can cause an output step even with a constant analog input. The primary tutorial models coupling through gate-drain capacitance and shows the resulting step separately from retained-charge transients.^[ref]

For a node modeled by total capacitance $C_L$, define $Q_{\mathrm{inj}}$ as the net charge deposited there. Charge balance givesIn an original example, $Q_{\mathrm{inj}}=0.50\mathrm{pC}$ on $C_L=50\mathrm{pF}$ produces a $10\mathrm{mV}$ step. Doubling the capacitance would halve that step if the deposited charge were unchanged. In an actual circuit the charge distribution can also depend on the node impedances and signal level, so that last assumption needs testing.

A useful measurement holds the analog input constant, toggles the control and records the signal node at a specified delay after the transition. Varying load capacitance helps distinguish an approximately fixed charge from other transient effects. Probe capacitance belongs in the node model.

The sign is determined by the circuit and switching direction. A charge step is not the same as a finite switch-on delay or a residual from incomplete discharge. When the switch opens an integrating feedback path, its consequence can be a reset charge-injection pedestal; a longer preceding reset need not remove charge deposited afterward.

An integrator reset establishes the charge on an integrating amplifier's feedback capacitor before the next measurement. Without it, the next output includes the previous initial condition, and repeated input pulses or input offset voltage can eventually cause amplifier clipping. Resetting makes consecutive measurement intervals comparable; it does not reconstruct a pulse already lost to amplifier clipping.

Consider an inverting integrating amplifier with the input held at zero during reset. Place an analog switch across its feedback capacitor $C$. In the approximation of a stable ideal operational amplifier maintaining a virtual ground, a closed switch with constant on-state electrical resistance $R_{\mathrm{on}}$ gives the RC circuit relationThis exponential decay gives an integrator reset settling time for residual magnitude at most $\epsilon$:For stipulated values $C=10\mathrm{nF}$, $R_{\mathrm{on}}=10\mathrm{k\Omega }$ and $|V_{\mathrm{old}}|=0.50\mathrm{V}$, the reset time constant is $100\mu \mathrm{s}$. Reaching a residual of $1\mathrm{mV}$ requires about $621\mu \mathrm{s}$ in this model. Actual amplifier drive, stability and recovery from overload can change the response. A switch's control delay also differs from the full circuit's settling time.^[ref]

Opening the reset switch can itself disturb the initial condition. Analog switch charge injection transfers a small charge to the connected capacitor, producing a reset charge-injection pedestal of magnitudeFor a stipulated $10\mathrm{pC}$ deposited on $10\mathrm{nF}$, this step is $1\mathrm{mV}$. Its sign depends on the circuit and charge direction. A longer reset suppresses the preceding exponential residual but need not suppress the new step created when the switch opens. Analog Devices illustrates this capacitive coupling mechanism and the resulting output step separately from retained-charge settling.^[ref]

A practical experiment repeats zero-input measurements with several reset durations and reads the output at the same delay after switch opening. A decreasing residual indicates incomplete discharge; a persistent offset can instead include reset charge-injection pedestal, input offset voltage and subsequent drift. Repeated readings help separate the reproducible offset from noise. The ACF2101 provides a concrete historical implementation: separate hold and reset controls disconnect the input and discharge the integration capacitor, and its datasheet shows the sequence of hold, integration and reset states.^[ref]

The reset interval also creates integrator reset dead time: charge arriving while the circuit is being reset may not contribute to the next measured integral. Pulse timing relative to the reset therefore matters. A perfectly repeatable baseline alone does not establish that every input pulse was captured.

Integrator reset dead time is the interval during which incoming charge is excluded from the reported measurement because the integrator is resetting or not yet ready for acquisition. A switched-integrator implementation has distinct integration, hold and reset states; the historical datasheet shows those states and their timing.^[ref]

For an original periodic schedule, acquire during the first $80\mu \mathrm{s}$ of every $100\mu \mathrm{s}$ cycle, reset for the next $10\mu \mathrm{s}$ and exclude the final $10\mu \mathrm{s}$ for settling. The duty cycle is $80\%$. If short-pulse arrival phases are independent and uniform over that cycle, the expected captured fraction is $0.80$.

That fraction does not apply to every pulse train. Pulses spaced by $100\mu \mathrm{s}$ and arriving at phase $85\mu \mathrm{s}$ are all missed in the ideal schedule. The same train at phase $20\mu \mathrm{s}$ is entirely captured. The clock synchronization matters as much as the fraction of time spent acquiring.

A bench check compares accepted events with an independent pulse monitor while changing their phase relative to the reset command. State whether the excluded interval includes the switch delay, discharge interval, post-opening transient and readout recovery. A stable zero-input baseline alone cannot demonstrate that every pulse was accepted. The integrator reset settling time and a reset charge-injection pedestal concern readiness and initial conditions, while dead time concerns which signal arrivals contribute at all.

A reset error budget with a persistent pedestal assigns separate tolerance to a decaying pre-reset residual and an offset created when the reset switch opens. Increasing the preceding discharge time can reduce the former without reducing the latter. The integrator reset settling time article derives the basic worst-case bound and its logarithmic reset-duration requirement.

A focused extension includes leakage during a fixed post-opening readout delay $d$. Let the pre-reset residual magnitude be at most $R$, its decay time constant be $\tau$, the opening reset charge-injection pedestal magnitude be at most $p$, and subsequent electric current magnitude be at most $I_{\max }$ on fixed capacitance $C$. The triangle inequality givesThis separates a duration-controlled term from an error floor $F=p+I_{\max }d/C$. For $R>0$ and a required guarantee $|e|\le \epsilon$, finite reset time is possible from this bound only when $\epsilon >F$, and

For an original chosen circuit, take $R=0.10\mathrm{V}$, $\tau =5\mu \mathrm{s}$, $p=0.50\mathrm{mV}$, $C=100\mathrm{pF}$, $I_{\max }=1.0\mathrm{nA}$ and $d=20\mu \mathrm{s}$. Leakage consumes $0.20\mathrm{mV}$. A $1.0\mathrm{mV}$ total tolerance leaves $0.30\mathrm{mV}$ for the old residual, requiring about $29.0\mu \mathrm{s}$ of reset. A $0.60\mathrm{mV}$ tolerance requires changing the stipulated pedestal or readout conditions; reset duration alone cannot guarantee it.

These are worst-case bounds, not root-sum-square standard uncertainties. Test the discharge by varying $T$, the opening step with zero-input records, and the subsequent drift by varying $d$. Real charge transfer depends on switching sequence, and prior overload can require separate recovery.^[ref] Accidental cancellation of signed errors is not a reproducible worst-case margin.

Reset pedestal variance is the acquisition-to-acquisition variance of the output offset associated with integrator reset. In a model where the only fluctuating contribution is an opening charge $Q$ on fixed capacitance $C$,Subtracting the mean of the reset charge-injection pedestal removes its constant component, not the random spread. The physical datasheet distinguishes charge-transfer offset from output noise; its charge-transfer limit alone is not a statistical variance specification.^[ref]

Finite blank measurements introduce another contribution. Suppose independent pedestals have mean $\mu$ and standard deviation ${\sigma }_P$. Use $M$ independent zero-input acquisitions to estimate $\mu$, then subtract that same blank sample mean from each of $N$ new signal acquisitions. With a constant signal and no other noise, the corrected mean hasThis variance of a pedestal-corrected sample includes the uncertainty of the shared correction. Its second contribution does not shrink when more signal acquisitions reuse the same blank estimate. Covariance-based uncertainty propagation retains such shared terms.^[ref]

For original stipulated ${\sigma }_P=0.20\mathrm{mV}$, $N=100$ and $M=25$, the corrected mean has standard deviation $0.0447\mathrm{mV}$. An exactly known pedestal mean would give $0.0200\mathrm{mV}$. Repeated zero-input acquisitions at a fixed delay after switching measure the combined pedestal/readout spread; separating its mechanisms requires additional tests. Slow drift or correlations between acquisitions invalidate the independent-sample formula and must enter the measurement model.

The variance of a pedestal-corrected sample quantifies the random spread remaining after subtracting an estimated baseline from a signal acquisition. Subtracting a mean reset charge-injection pedestal removes an offset; it does not automatically remove reset pedestal variance. For a raw signal sample $Y$ and pedestal estimate $B$,The covariance term determines whether subtraction suppresses shared fluctuations or adds independent noise. The GUM's correlated-input rule gives this identity directly for the linear measurement model $f(Y,B)=Y-B$.^[ref]

Two correction procedures have different statistical consequences. First suppose signal acquisitions have independent pedestals $P_i$ of variance ${\sigma }_P^2$ and independent readout noise ${\eta }_i$ of variance ${\sigma }_{\eta }^2$. A separate mean of $M$ independent blank acquisitions, with individual variance ${\sigma }_B^2$, is reused for every signal sample:After removing any constant means, independence givesConsequently, averaging $N$ corrected samples givesThe shared blank correction creates a common uncertainty floor, as in shared calibration error.

Alternatively, a baseline and signal reading from the same acquisition can share a fluctuating pedestal. In an idealized correlated double sampling model, $R=B_0+e_R$ and $Y=s+B_0+e_Y$, so $Y-R=s+e_Y-e_R$: the common $B_0$ cancels. Independent readout noises remain and their variances add. More generally, if paired readings each have standard deviation0.20millivolt and correlation coefficient0.9, their difference has standard deviationTreating that pair as independent would predict0.283millivolt instead.

An experimental assessment records paired zero-input samples at the actual acquisition delays and estimates their covariance, then distinguishes that procedure from reusing a separate blank mean. The ACF2101 datasheet specifies output noise and charge-transfer errors separately; a charge-transfer limit is not itself a pedestal variance or evidence for a particular correlation.^[ref]