A fixed-width collection of flip-flops storing a binary representation. A synchronous load-enabled digital register captures all its input bits on the active clock edge when load is asserted and otherwise retains its old value. One multiplexer before each D flip-flop can select new data or feedback from its old output. A processor register is a particular use inside a processor; temporary state in a standalone binary multiplier is another.
A chain of digital registers that transfers each stored value to the next stage at a clock edge. A serial-in parallel-out shift register exposes the stored history simultaneously. With the current input and delayed samples, combinational logic can evaluate a function of the latest samples.
A shift register accepting one sample at each clock edge and exposing every stored stage as a parallel output.
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