Electrical circuit

An electrical circuit is a network of components and connections used to transport electric charge and exchange energy. Resistors dissipate energy, capacitors store energy in an electric field, and inductors store energy in a magnetic field.

A lumped-element model represents the circuit by branch electric currents and terminal electric potential differences. Kirchhoff's current law expresses charge balance at connections, while Kirchhoff's voltage law relates the branch voltages around loops. ^[ref] For constant ideal components, with current entering the positive-voltage terminal,Combining these relations produces algebraic equations or time-dependent differential equations.

For example, an RC circuit charging an initially uncharged capacitor from a fixed voltage source $V_0$ obeysThe product $RC$ is its time constant. This transient connects energy storage to the rate of the circuit's response. ^[ref] When propagation along connections matters, a transmission line description can replace a single lumped model.

The sinusoidal steady state of a stable linear time-invariant system driven by a sinusoid is its persistent response at the driving frequency, after the relevant transient response has decayed. A phasor calculation finds that response; it does not generally satisfy the circuit's switch-on initial conditions. The late-time assumption is explicit in Berggren's treatment of sinusoidal circuit analysis.^[ref]

Using peak phasors, write the source as $v_s(t)=\mathrm{Re}({\hat{V}}_s{e}^{i\omega t})$. If $H(i\omega )$ is the relevant transfer function, its particular solution isThe complete response adds a homogeneous solution determined by the initial conditions. Approaching the displayed expression requires the modes affecting the measured output to decay; an unchanged amplitude and a fixed phase shift then characterize its frequency response.

For an original turn-on example, drive a series RC circuit with $v_s(t)=V_0\cos \omega t$ for $t\ge 0$, measure the capacitor's electric potential difference, and take $v_C(0)=0$. With time constant $\tau =RC>0$, Kirchhoff's voltage law gives the first-order linear differential equationPut $x=\omega \tau$. Substitution verifies the sinusoidal particular solution $V_0(\cos \omega t+x\sin \omega t)/(1+x^2)$. Adding $A{e}^{-t/\tau }$ and imposing the initial condition fixes $A=-V_0/(1+x^2)$, givingIts sinusoidal part has amplitude $V_0/\sqrt{1+x^2}$ and lags by $\arctan x$. The exponential settling bound for RC sinusoidal turn-on, relative to that amplitude, isWith chosen $R=1\mathrm{k\Omega }$, $C=1\mu \mathrm{F}$, $V_0=1\mathrm{V}$ and $\omega =1000rad/s$, we have $\tau =1\mathrm{ms}$ and $x=1$. At turn-on the phasor approximation predicts 0.5 volt while the capacitor is initially at zero. After 5 milliseconds, their difference is about 3.37 millivolts, or 0.476 percent of the sinusoidal amplitude. A 1 percent settling time threshold for this specific switch-on is about $4.259\tau$.

A useful measurement compares a long, low-frequency square-wave response with sinusoidal responses at several frequencies. An oscilloscope can identify the exponential decay and then measure amplitude ratios and phase shifts. MIT's laboratory uses that sequence to connect the time constant to the sinusoidal response; probe loading belongs in the measured circuit model.^[ref]

Undamped resonant forcing has no bounded sinusoidal steady state. For an ideal series LC circuit, let $q$ be electric charge and ${\omega }_0=1/\sqrt{LC}$. At resonance, the equationhas the particular solution $q_p(t)=V_{0}t\sin ({\omega }_{0}t)/(2L{\omega }_0)$. Its growing envelope prevents a bounded attracting sinusoidal response. This ideal counterexample explains why decay of the relevant homogeneous solutions is part of the physical steady-state assumption.

Undamped resonant forcing has no bounded sinusoidal steady state because the forcing continually adds energy to a mode that has no dissipation. For a series LC circuit driven from rest by $V_0\cos \omega t$, let $q$ be its electric charge and ${\omega }_0=1/\sqrt{LC}$. When $\omega \ne {\omega }_0$, imposing $q(0)=\dot{q}(0)=0$ on the linear ordinary differential equation givesBoth frequencies persist: the undamped homogeneous solution never disappears. Taking the limit $\omega \to {\omega }_0$ at fixed time produces the growing resonant response described in sinusoidal steady state. Its factor proportional to time cannot be removed by adding a bounded homogeneous solution.

For an original numerical example, choose $L=10\mathrm{mH}$, $C=1\mu \mathrm{F}$ and $V_0=1\mathrm{V}$. Then ${\omega }_0=10^4\mathrm{rad}{\mathrm{s}}^{-1}$. At exactly ten resonant periods, $t=20\pi /{\omega }_0\approx 6.283\mathrm{ms}$, the resonant solution has $q=0$ butAt twenty periods the electric current doubles and the stored magnetic energy quadruples. These are ideal-model values; a real source and winding have finite electrical resistance and ratings.

With positive series resistance $R$, the resonant phasor calculation instead gives current amplitude $V_0/R$. The DOE handbook explicitly identifies resistance as the remaining series electrical impedance at resonance.^[ref] For weak damping, decay takes a time of order $2L/R$, which grows as resistance decreases. These noncommuting damping and observation-time limits at resonance explain why an infinite steady-state amplitude is a failed limiting calculation, not the actual finite-time response. The late-time transient assumption underlying sinusoidal analysis must be checked.^[ref]

Noncommuting damping and observation-time limits at resonance means that the late-time approximation of a damped circuit is not uniform as its dissipation tends to zero. A precise comparison needs an observable: the unnormalized resonant sinusoid itself has no ordinary limit as time tends to infinity. Use the series RLC circuit with zero initial conditions, source $V_0\cos {\omega }_{0}t$, and ${\omega }_0=1/\sqrt{LC}$. For $R>0$, its steady-state electric charge and electric current areThe remaining electrical resistance sets the resonant amplitude, as in the DOE series-resonance model.^[ref]

Define a dimensionless state error relative to that amplitude:For each fixed $R>0$, the homogeneous solution decays and $D_R(t)\to 0$. Conversely, on a fixed finite observation interval the actual circuit solution converges to the finite undamped solution as $R\downarrow 0$. The two terms containing $R$ then vanish, giving $D_R(t)\to 1$. Thus the genuine iterated limits areThis states the failure without treating an oscillating quantity as though it had a time limit.

For weak damping, put $\gamma =R/(2L)$ and ${\omega }_d=\sqrt{{\omega }_0^2-{\gamma }^2}$. The exact zero-state chargeboth verifies the decaying transient and recovers the undamped resonant response in undamped resonant forcing has no bounded sinusoidal steady state by a fixed-time expansion.

For an original timing comparison, $L=10\mathrm{mH}$ gives envelope decay times $2L/R=0.1\mathrm{s}$ at $R=0.2\Omega$ and $1\mathrm{s}$ at $R=0.02\Omega$. At a fixed $50\mathrm{ms}$ the respective exponential multipliers are about $0.607$ and $0.951$. A smaller electrical resistance can make the sinusoidal late-time approximation worse over a fixed acquisition window. MIT's steady-state notes explicitly require the startup transient to have disappeared.^[ref]

The exponential settling bound for RC sinusoidal turn-on measures the decaying error relative to the persistent sinusoid's amplitude, rather than dividing by a sinusoid that repeatedly crosses zero. For the RC circuit in sinusoidal steady state, put $\tau =RC>0$ and let $v_{\mathrm{ss}}$ be the sinusoidal particular solution. Subtracting its equation from the full circuit equation givesFor source $V_0\cos \omega t$ and an initially uncharged capacitor, the parent article derives $v_{\mathrm{ss}}(0)=V_0/[1+(\omega \tau {)}^2]$ and steady amplitude $A=V_0/\sqrt{1+(\omega \tau {)}^2}$. Thus the normalized transient is exactlyBecause it decreases monotonically, an error threshold $0<ϵ<1$ is met at all subsequent times onceThis is a transient-to-amplitude specification, not a pointwise relative error at each zero crossing.

For an original comparison, choose $\tau =2\mathrm{ms}$, $\omega \tau =3$, and $ϵ=0.01$. The stated cosine turn-on needs $t_{ϵ}\approx 6.908\mathrm{ms}$. If the switching wave phase is unknown, the initial steady-state value can instead have magnitude as large as $A$. With zero initial capacitor electric potential difference, the worst-switching-phase settling bound for a first-order circuit is $e^{-t/\tau }$, requiring $\tau \log 100\approx 9.210\mathrm{ms}$. The shorter first result depends on the specified switching phase.

An unknown stored initial energy changes the leading mismatch again; the same exponential identity still applies. A bench test must therefore record the switching phase, initial capacitor electric potential difference, and the chosen normalization. MIT's RC laboratory measures the natural decay with square-wave excitation and then compares sinusoidal amplitudes and phases on an oscilloscope.^[ref]

The worst-switching-phase settling bound for a first-order circuit maximizes the initial transient over the source's unknown switching wave phase. For the stable RC circuit, let its sinusoidal particular solution be $v_{\mathrm{ss}}(t)=A\cos (\omega t+\psi )$, where $A>0$, and let $u_0$ be the initial capacitor electric potential difference. The error identity in exponential settling bound for RC sinusoidal turn-on givesSince $\cos \psi$ ranges from minus one to one,For a validated initial bound $|u_0|\le U$, the sharp uniform bound is therefore $(1+U/A)e^{-t/\tau }$. It is attained by choosing the extreme initial value and the opposite steady-state wave phase. A normalized error tolerance $0<ϵ<1$ is guaranteed thereafter ifThere is no division by the instantaneous sinusoid, so its zero crossings cause no singular relative-error specification.

For an original example, choose $\tau =4\mathrm{ms}$, $A=0.5\mathrm{V}$, $U=0.25\mathrm{V}$, and $ϵ=0.02$. The worst-case settling time is $4\log 75\approx 17.270\mathrm{ms}$. Assuming an uncharged capacitor instead would give $4\log 50\approx 15.648\mathrm{ms}$. That shorter guarantee requires the additional initial-state information.

A phase-locked test can measure a smaller mismatch, even zero for a specially matched initial condition, without contradicting the worst-case result. A valid comparison records both the switching wave phase and the capacitor's initial state. The MIT laboratory's square-wave natural-decay observation and sinusoidal amplitude/wave phase measurement provide the two underlying bench measurements.^[ref] The result assumes the same linear first-order model throughout switching; additional modes or a time-varying component require another transient bound.

An electronic comparator is an electrical circuit that converts the ordering of two input electric potential differences into an output state. For the usual non-inverting convention, the output is high when $V_{+}>V_{-}$ and low when $V_{+}<V_{-}$. Unlike a linear amplifier, an electronic comparator deliberately makes a threshold decision; its output does not report how large the input difference is. A sensor signal can therefore become a pulse marking the instant it crosses a reference.

Real threshold decisions have an input offset voltage and a finite propagation delay. The permitted input range and the output drive also matter: an open-drain output needs a pull-up resistor, whereas a push-pull output drives both states. The manufacturer’s inverting example explicitly includes the pull-up resistor and explains how input offset voltage, resistor tolerances and internal hysteresis affect the thresholds.^[ref]

With a single threshold, a slowly varying input plus electrical noise can cause repeated transitions. A Schmitt trigger adds hysteresis: the threshold depends on the existing output state. For an illustrative non-inverting design, suppose the output switches high on a rise through $2.55\mathrm{V}$ and low on a fall through $2.45\mathrm{V}$. At $2.50\mathrm{V}$, either output is possible, depending on the preceding input. The $0.10\mathrm{V}$ interval is deliberate memory of the last state, rather than an ambiguous instantaneous comparison. Positive feedback can produce this behavior; the cited design derives the two thresholds from the feedback resistor network.^[ref]

A useful bench demonstration applies a slow triangular input with a small superposed ripple and displays both input and output on an oscilloscope. Record the rising and falling switching levels separately. Repeated transitions near one level demonstrate noise sensitivity; distinct rising and falling levels demonstrate hysteresis. The time between an input crossing and the output transition measures propagation delay, a different quantity from the separation between the two thresholds.

A Schmitt trigger is a threshold circuit with hysteresis: its switching level depends on its current output state. An input rising through an upper threshold causes one transition, whereas an input falling through a lower threshold causes the reverse transition. Between the thresholds, the circuit retains the state reached previously. This makes a Schmitt trigger useful for turning a slowly varying or noisy signal into clean transitions, rather than repeatedly switching whenever noise crosses a single reference level.^[ref]

A simple inverting implementation puts the signal on the negative input of an electronic comparator. Connect its positive input to output $V_o$ through a resistor $R_o$ and to a reference $V_r$ through a resistor $R_r$. Neglecting comparator input current, Kirchhoff's current law givesFor ideal high and low output levels $V_H,V_L$, the input switches on a rise at $V_{\uparrow }=\alpha V_H+(1-\alpha )V_r$ and on a fall at $V_{\downarrow }=\alpha V_L+(1-\alpha )V_r$. Thus the separation of the switching thresholds isThe output feeds back so as to reinforce its new state: after a rising input makes the output low, the positive-input threshold falls too.

For illustrative values $R_o=90\mathrm{k\Omega }$, $R_r=10\mathrm{k\Omega }$, $V_r=2.5\mathrm{V}$, $V_H=5\mathrm{V}$ and $V_L=0$, the thresholds are $2.75\mathrm{V}$ and $2.25\mathrm{V}$. At an input of $2.50\mathrm{V}$, the output can be either high or low, depending on the preceding trajectory. These chosen numbers describe the ideal circuit above, not a particular device specification.

An oscilloscope demonstration applies a slow triangular input with a small ripple and records input and output together. Compare the rising and falling transition levels, and then reduce the threshold separation to see when the ripple produces additional transitions. In a real circuit, input offset voltage, resistor tolerances, output loading and any internal hysteresis change the thresholds. An open-drain output also requires a pull-up resistor; its load must be included in the feedback calculation.^[ref]

An analog switch uses a control signal to connect or disconnect an analog signal path. The control chooses the conducting state; the transmitted electric potential difference is not restricted to a binary logic value. Real devices have finite analog switch on-resistance, leakage and parasitic capacitance. The primary tutorial describes a bilateral CMOS switch formed from complementary transistors.^[ref]

For an original loading example, connect an ideal $1\mathrm{V}$ source through a stipulated $100\Omega$ on-resistance to a $10\mathrm{k\Omega }$ load. The output isThe closed switch therefore changes the amplitude even before any switching transient is considered. This is a chosen resistor model, not a specification for a particular part. Variation of on-resistance with signal level can additionally produce distortion.

An open switch is also not an ideal infinite impedance. For example, a stipulated $10\mathrm{nA}$ analog switch leakage current into $100\mathrm{pF}$ changes the node potential at $I/C=100V/s$, or $0.10\mathrm{V}$ in a millisecond if that model remains valid. A high-impedance measurement can be sensitive to this small current.

On a bench, compare the transmitted level and the open-state drift with the same source, load and oscilloscope conditions. Analog switch charge injection concerns the control transition itself, while settling time concerns how long the complete circuit needs to approach its final value. Those effects are separate from the static conducting-state error.

Analog switch leakage current is unwanted electric current at an analog switch's signal terminals under stated terminal potentials, switch state and temperature. It can produce a steady offset in a resistive load or accumulate electric charge on an isolated capacitor. The manufacturer's equivalent circuits distinguish on-state and off-state leakage paths; their effects depend on the external circuit.^[ref]

For an original chosen model, let a constant $20\mathrm{pA}$ enter a node with a $50\mathrm{M\Omega }$ resistor to a reference. The steady electric potential difference error is $IR=1.0\mathrm{mV}$. Replacing that load by an initially isolated $200\mathrm{pF}$ capacitor instead givesA $100\mu \mathrm{V}$ drift allowance is exhausted in $1.0\mathrm{ms}$. This leakage-limited hold time assumes constant leakage and capacitance; it ceases to apply if the changing node potential substantially changes the leakage. With both the resistor and capacitor present, $Cdv/dt=I_{\mathrm{leak}}-v/R$ approaches the steady error exponentially.

To measure the effect, hold the switch control fixed, disconnect the intended signal current and record the stored-node slope with known total capacitance. Repeat for relevant terminal potentials and temperatures. Readout input current and board leakage must be included in the measurement model. A one-time step at a control transition instead suggests analog switch charge injection; a sustained slope after that step is a different error mechanism.

The leakage-limited hold time is the duration for which a stored electric potential difference remains within a stated drift allowance when unwanted electric current changes the stored electric charge. For a constant net leakage $I_{\mathrm{leak}}$ into a fixed capacitance $C$,An allowed drift $\epsilon >0$ therefore gives $T_{\max }=C\epsilon /|I_{\mathrm{leak}}|$. This is a limit from a specified error mechanism, not the complete accuracy or usable duration of an instrument. The ACF2101 datasheet identifies amplifier bias, capacitor leakage and switch leakage as separate contributions to droop.^[ref]

For an original example, a4.7nanofarad capacitor,50picoamperes of net leakage and a0.20millivolt drift allowance giveIf the readout adds a further30picoamperes in the same direction, the correct total is80picoamperes and the duration falls to11.75milliseconds. The relevant electric current is the sum of all paths at the stored node, not necessarily the isolated analog switch leakage current specification.

For time-dependent leakage, the exact charge balance isA verified bound $|I_{\mathrm{net}}(t)|\le I_{\max }$ guarantees $|\Delta v(T)|\le I_{\max }T/C$. Oppositely signed contributions can cancel at one operating point without providing that bound elsewhere. Temperature, terminal potentials and board leakage must match the intended operating conditions.^[ref]

A bench check records the held node at several delays after the switching transient, using a known total capacitance and a readout whose input current is included in the model. The slope estimates net leakage. A step created at the transition is analog switch charge injection, not steady droop. If the initial step already uses part of a total error allowance, only the remaining allowance is available for calculating the leakage-limited hold time.

Analog switch on-resistance is the conducting path's effective electrical resistance at a specified signal level, supply and temperature. In a locally resistive model, $R_{\mathrm{on}}=\Delta v/i$. It is neither an ideal short circuit nor necessarily constant as the signal moves. Complementary switch devices reduce signal-dependent resistance variation, as the manufacturer's circuit and curves illustrate.^[ref]

An original example drives a $1.0\mathrm{k\Omega }$ load from an ideal source through $R_{\mathrm{on}}=30\Omega$. The voltage divider givesIf the analog switch on-resistance rises to $50\Omega$ elsewhere in the signal range, the ratio becomes $0.95238$, about $1.90\%$ below its first value. One gain correction cannot make both ratios exact. Switch on-resistance flatness therefore matters separately from the minimum resistance; variation with the signal can create nonlinearity.

The same resistance affects dynamics. A stipulated constant $50\Omega$ discharging $2.0\mathrm{nF}$ has RC circuit time constant $0.10\mu \mathrm{s}$ and requires $\tau \log 100\approx 0.461\mu \mathrm{s}$ to reduce an initial residual to one percent. This is a chosen single-pole model; amplifier dynamics can extend the actual integrator reset settling time.

On a bench, measure the terminal drop at known electric current while sweeping the signal level within the permitted range. Separate a nearly constant series loss from its signal-dependent variation. The source resistance and load belong in that measurement; the switch's control propagation delay is not its conducting-path resistance.

Switch on-resistance flatness describes how little an analog switch on-resistance changes across a stated analog signal range, at specified supply and temperature. A common measure is the peak-to-peak differenceThe signal interval $\mathcal{V}$ is part of the definition. A small minimum resistance does not establish good switch on-resistance flatness. Analog Devices illustrates how complementary transistor paths flatten the resistance curve and explains the distinction between fixed attenuation and signal-dependent distortion.^[ref]

For an original quasistatic model, an ideal source drives a load $R_L$ through a switch withHere the stipulated resistance law uses the source signal $v$; it is not a transistor model or a device specification. For $|\beta v^2|\ll R_L+r_0$, expansion givesWith $v=A\sin \omega t$, the identity ${\sin }^3\theta =(3\sin \theta -\sin 3\theta )/4$ yieldsA constant gain correction cannot remove the generated third harmonic.

Taking $R_L=1000\Omega$, $r_0=10\Omega$, $\beta =2\Omega /{\mathrm{V}}^2$ and $A=1\mathrm{V}$ gives a resistance range10–12ohms and an approximate third-harmonic amplitude0.490millivolts. Its ratio to the fundamental is about0.050percent. This selected low-frequency calculation isolates a static nonlinearity; it omits switch capacitances and amplifier dynamics.

A practical test holds the switch on, applies a small known electric current, and sweeps the terminal signal level while measuring the conducting-path drop. Measuring several temperatures and supply conditions separates flatness over signal from changes between operating conditions. A second test with a sinusoidal source and Fourier analysis checks whether the complete circuit produces harmonics; source and readout distortion must be measured independently.

Analog switch charge injection is charge transferred to a signal node when the switch control changes. Capacitive coupling from the internal control transition can cause an output step even with a constant analog input. The primary tutorial models coupling through gate-drain capacitance and shows the resulting step separately from retained-charge transients.^[ref]

For a node modeled by total capacitance $C_L$, define $Q_{\mathrm{inj}}$ as the net charge deposited there. Charge balance givesIn an original example, $Q_{\mathrm{inj}}=0.50\mathrm{pC}$ on $C_L=50\mathrm{pF}$ produces a $10\mathrm{mV}$ step. Doubling the capacitance would halve that step if the deposited charge were unchanged. In an actual circuit the charge distribution can also depend on the node impedances and signal level, so that last assumption needs testing.

A useful measurement holds the analog input constant, toggles the control and records the signal node at a specified delay after the transition. Varying load capacitance helps distinguish an approximately fixed charge from other transient effects. Probe capacitance belongs in the node model.

The sign is determined by the circuit and switching direction. A charge step is not the same as a finite switch-on delay or a residual from incomplete discharge. When the switch opens an integrating feedback path, its consequence can be a reset charge-injection pedestal; a longer preceding reset need not remove charge deposited afterward.

A circuit node is a set of electrically connected points treated as having a common electric potential in a lumped-element model. Ideal connecting wires belong to the same circuit node even if the drawing places them far apart.

Conservation of electric charge leads to Kirchhoff's current law: the algebraic sum of currents entering an ideal node is zero when unmodelled charge accumulation is negligible. For example, a current entering a junction equals the sum of two outgoing branch currents. A capacitor connected at that node does not invalidate the law: its charging current must be included as another branch current.

A lumped-element model represents an electrical circuit by discrete ideal elements such as resistors, capacitors and inductors, linked by equipotential circuit nodes. Each element is assigned terminal variables, rather than a fully resolved spatial electromagnetic field.

This approximation is effective when signal-propagation times across the circuit are short compared with the timescales of interest, and the relevant dimensions are small compared with the wavelength. A long cable carrying a rapid pulse may instead require a transmission line model: different points on the cable can have different voltages at the same instant.

An RC circuit contains electrical resistance and capacitance. For a series resistor $R$ charging a capacitor $C$ from a constant voltage $V$, Kirchhoff's voltage law and $i=Cd{v}_C/dt$ give $RCd{v}_C/dt+v_C=V$.

With an initially uncharged capacitor, $v_C(t)=V(1-e^{-t/(RC)})$. The time constant $\tau =RC$ is the time to reach $1-e^{-1}$ of the final voltage. With the source removed, the same model predicts exponential discharge. Measuring this response provides a simple way to determine an unknown capacitance or to construct a smoothing low-pass filter.

An effective source resistance in a specified circuit model: a source with electromotive force $\mathcal{E}$ drives $I=\mathcal{E}/(R_s+R_L)$ through a resistive load $R_L$. A biological source or electrochemical interface can require a frequency-dependent or nonlinear model instead.

Consider two voltage dividers across a common source, with impedances $Z_0,Z_1$ in one branch and $R_1,Z_p$ in the other. Equal midpoint voltage phasors imply $Z_0{Z}_p=R_1{Z}_1$. If $Z_0=R_0+1/(i\omega C_0)$, $Z_1=1/(i\omega C_1)$ and $Z_p=(1/R+i\omega C{)}^{-1}$, then separating real and imaginary parts proves $R_0=R_{1}C/C_1$ and $C_0=R{C}_1/R_1$. The topology, especially the parallel standard arm, is essential.

A null electrical circuit for measuring a lossy inductor against a standard capacitor. If opposite arms are $R_x+i\omega L_x$ and $(1/R_1+i\omega C{)}^{-1}$, and the remaining arms are $R_2,R_3$, balance requires their products to agree. Consequently $R_x=R_2{R}_3/R_1$ and $L_x=C{R}_2{R}_3$. Two independent real adjustments are necessary; changing the source frequency does not change the ideal balance conditions.

A bridge driven between top and bottom nodes has equal resistors on its left arms, upper-right electrical impedance $Z=R_x/(1+i\omega R_x{C}_x)$ and lower-right electrical impedance $W=R_v+1/(i\omega C)$. A zero detector electric current requires $Z=W$. Equating real parts and imaginary parts gives $R_v=R_x(1-C_x/C)$ and ${\omega }_0^{-2}=R_x^2{C}_x(C-C_x)$, requiring $0<C_x<C$. Its open-circuit right-minus-left junction voltage is $V_0(W-Z)/[2(W+Z)]$, whereas a connected ideal ammeter has zero terminal voltage at every angular frequency. This distinction separates a null-current measurement from an unloaded voltage measurement.

The fraction of an operating cycle spent in a specified active state. For two constant-current states, average current is $\bar{I}=D{I}_a+(1-D)I_s$; wake-up transients require an additional energy term.

Alternating an active mode with a lower-power mode to reduce average demand. Sleep current and transition overhead prevent average power from falling indefinitely in direct proportion to active time.

An ideal short circuit fixes zero electric potential difference across a terminal pair, corresponding to zero load electrical impedance. At the end of a lossless transmission line, its voltage-wave reflection coefficient is $-1$ and the terminal voltage is zero. The available current is still limited by source and circuit impedances; real short circuits can dissipate substantial Joule heating.

An ideal open circuit permits no conduction electric current through a terminal pair, corresponding to infinite load electrical impedance. At the end of a lossless transmission line, its voltage-wave reflection coefficient is $+1$ and the terminal current is zero. Real open terminals may retain parasitic capacitance and radiation loss.

A circuit node held close to zero electric potential by active feedback, without being directly connected to the reference conductor. In an ideal linear operational amplifier with its non-inverting input grounded and stable negative feedback, $V_{-}=V_{+}=0$ while neither input draws electric current. External branch currents meeting the inverting node therefore obey Kirchhoff's current law without flowing into the amplifier input. Equality of the input potentials fails when the output saturates or the feedback ceases to enforce linear operation.

An alternating-current electrical circuit comparing a parallel resistor-capacitor arm with a series resistor-capacitor arm. Let the upper-left arm have electrical impedance $Z_1=R_1/(1+i\omega R_1{C}_1)$, the lower-left arm $Z_2=R_2+1/(i\omega C_2)$, and the upper-right and lower-right arms have electrical resistances $R_3,R_4$. For input between the upper and lower nodes and an unloaded difference measurement between the arm junctions, voltage divider balance requires $Z_2/Z_1=R_4/R_3$. Separating real and imaginary parts givesThe balance angular frequency is positive for positive components. Equal $R_1=R_2=R$ and $C_1=C_2=C$ require $\omega =1/(RC)$ and $R_4=2R_3$. Reversing which reactive arm is upper changes the divider ratios, so the connections must always be specified.

Use the equal-component Wien bridge with upper-left parallel arm and lower-left series arm. Let $A$ be the left arm junction, $C$ the upper input node, and $V_i$ the upper-minus-lower input electric potential difference. With $u=\omega RC$, the unloaded transfer ratio $H=(V_A-V_C)/V_i$ is the displayed expression. Its band-pass filter magnitude is $[9+(u-u^{-1}{)}^2{]}^{-1/2}$, maximal at $u=1$ with $H=-1/3$. One continuous wave phase is $\varphi =-\pi -\arctan [(u-u^{-1})/3]$, tending from $-\pi /2$ at low positive frequency to $-3\pi /2$ at high frequency. Reversing the measured output polarity multiplies $H$ by $-1$ and shifts its phase by $\pi$ without changing its magnitude.

A two-port network relates voltage and current, or incoming and outgoing travelling-wave amplitudes, at two pairs of electrical terminals. Power-normalized scattering parameters obey $b_i={\sum }_j{S}_{ij}{a}_j$. In a reciprocal network with equal reference impedances, $S_{12}=S_{21}$. A load reflection at port 2 can return through both transmission coefficients to port 1.

A connection in which branches share both terminal nodes and therefore the same electric potential difference. Branch electric currents add. For sinusoidal signals, the total electrical admittance is the sum of branch electrical admittances; ideal capacitances add.

An ideal electrical circuit exchanges energy between an inductor and a capacitor. With no electrical resistance or applied drive, the electric charge obeys $L{q}^{\prime \prime }+q/C=0$, giving angular frequency ${\omega }_0=1/\sqrt{LC}$. A series RLC circuit adds dissipation and can include an external drive.

An ideal inductor and capacitor in parallel have electrical admittance $1/Z=1/(j\omega L)+j\omega C$ for phasors with time dependence $e^{j\omega t}$. The branch currents cancel at angular frequency ${\omega }_0=1/\sqrt{LC}$, giving zero total electrical admittance and an infinite limiting electrical impedance. Below this resonance its electrical reactance is positive; above it the electrical reactance is negative. Losses make the peak finite.

An ideal voltage source drives a series resistor feeding a parallel inductor and capacitor. In the $e^{i\omega t}$ convention, the branch voltage ratio is the title expression. It is a band-pass response with unit peak at $1/\sqrt{LC}$, phase from $+\pi /2$ through zero to $-\pi /2$, and half-power bandwidth $1/(RC)$. At resonance the input current vanishes while equal and opposite inductor/capacitor currents remain finite. Reactive branch-current magnitudes must be combined as phasors, not added as positive scalars.

A diode is a two-terminal component with an asymmetric current-voltage characteristic: reversing its terminal electric potential difference need not reverse its electric current with the same magnitude. Name the terminals diode anode $A$ and diode cathode $K$. Define $V_D={\varphi }_A-{\varphi }_K$ using their electric potentials, and take positive electric current $I_D$ from $A$ to $K$. The bar in the diode symbol marks $K$. Positive $V_D$ is the forward direction; negative $V_D$ is the reverse direction.^[ref]

The asymmetry makes a rectifier possible: a sinusoid can drive electric current through a resistor on one half of each cycle. An ordinary resistor obeying Ohm's law instead reverses its electric current when the applied electric potential difference reverses. The useful idea is directional selection; the ideal diode model captures it, while the Shockley diode equation describes a smooth exponential function rather than an abrupt switch.

The terminal of a diode at which positive forward electric current enters, with the orientation used in the ideal diode model.

The terminal of a diode at which positive forward electric current leaves. The bar in the diode symbol identifies this terminal.

The ideal diode model sets the conducting electric potential difference to zero and the blocking electric current to zero. With the stated orientation,^[ref]

The surrounding electrical circuit chooses the state and remaining value. The two branches meet at $V_D=I_D=0$. Their product vanishes, so the ideal diode dissipates no power: $P_D=V_D{I}_D=0$.

The ideal diode model omits forward drop, reverse leakage, diode reverse breakdown and switching delay.

For a p-n junction at fixed temperature, the Shockley diode equation models its electric current asHere $I_S>0$ is the diode saturation current, $n>0$ the diode ideality factor, $V_T$ the thermal voltage, $k_B$ the Boltzmann constant, and $q>0$ the elementary charge.^[ref]

For an original model example, choose $I_S=1\mathrm{nA}$, $n=2$, and $T=300\mathrm{K}$. Using $k_B=1.380649\times 10^{-23}J/K$ and $q=1.602176634\times 10^{-19}\mathrm{C}$ gives $V_T=25.8520\mathrm{mV}$. Then $V_D=0.600\mathrm{V}$ gives $I_D=0.109591\mathrm{mA}$, whereas $V_D=0.800\mathrm{V}$ gives $I_D=5.24450\mathrm{mA}$. These are predictions of the declared model. There is no universal turn-on electric potential difference: solving the Shockley diode equation for the value needed at a chosen electric current givesAt $I_D\gg I_S$, increasing $V_D$ by $0.100\mathrm{V}$ multiplies the electric current by approximately $e^{0.100/(n{V}_T)}=6.91772$. At $V_D=-0.300\mathrm{V}$ the same model gives $I_D=-0.996979\mathrm{nA}$. Its reverse branch approaches $-I_S$; it cannot describe diode reverse breakdown.

A constructed extension adds internal series electrical resistance $R_s$ to a junction whose electric potential difference is $V_j$. Applying the Kirchhoff cycle law givesFor $R_s=20\Omega$ and the same $I_S,n,T$, sustaining $I_D=5.24450\mathrm{mA}$ needs $V_D=0.904890\mathrm{V}$: $0.800\mathrm{V}$ across the junction plus $0.104890\mathrm{V}$ across its internal electrical resistance. The derivativeshows why the current-voltage characteristic becomes nearly a straight line when the internal series electrical resistance dominates. This is still a fixed-temperature model; self-heating can change $I_S$, $n$ and $V_T$. Real diodes also have leakage and charge-storage effects omitted here.^[ref]