Carl Victor Page, Jr. by Ciro Santilli 35 Updated +Created
Larry Pages's older brother.
It is hard to find information on this little bugger! Not a single photo online!
As suggested by the "Jr.", he is named after Larry's father, Carl Victor Page.
Carl Jr. is mentioned in a few places in the book The Google Story. The full name "Carl Victor Page Jr." is never given in that source, only "Carl Page Jr." is used. These crazy Anglo-Saxons and their semi-optional middle names!
The Google Story does not cite its sources, but it likely got much of its insider information through interviews, e.g. Chapter 2. "When Larry Met Sergey":
Carl Jr. recalls Larry as an inquisitive younger brother with wide-ranging interests
which suggests the authors actually interviewed Carl Jr., since interviews with Carl Jr. cannot be found anywhere else on the Internet. It would be interesting to know more how they got that level of access.
Chapter 2 mentions that Carl Jr. is nine years older than Larry. Therefore, he must have been born in 1963 or 1964. It also states that Carl studied at the University of Michigan, like his father and like Larry would also do later on:
He also enjoyed helping Carl Jr. - who was nine years older - with his college computer homework when Carl came home from the University of Michigan during breaks.Their father was a professor at the Michigan State University, which is a different university from the University of Michigan, and not in the same city, so by breaks they mean term breaks.
Chapter 2 also mentions that he was working in Silicon Valley by the time their father died in 1996:
Despite his grief [for the death of their father at the early age of 58], Larry remained enrolled at Stanford. It helped that his older brother, Carl Jr., lived and worked in Silicon Valley. They had each other, so Larry wasn't left to bear the loss alone, and the two spent time together, fondly recalling their dad and reflecting on their childhood memories.
In 1997, Carl co-founded the mailing list management website eGroups together with Scott Hassan, programmer of an early version of Google when he was a research assistant at Stanford University. Carl and Scott presumably met through Larry, but we don't have a source. The company was sold to Yahoo! in 2000. The Google Story Chapter 8. "A Trickle" mentions:
Google's deal with Yahoo!] had special significance for Larry Page, since his brother, Carl Jr., also was in serious negotiations with Yahoo! over a major business transaction. The following day, June 27, Yahoo announced plans to buy eGroups, a technology firm that Carl Page had co-founded, for $413 million.
Carl is listed as a co-founder in the SEC filing: www.sec.gov/Archives/edgar/data/1105102/0000950149-00-000584.txt as "Carl Page". He does not appear on the 5% stockholders however, poor Carl.
In 2006, he brought a company he founded called "Handheld Entertainment" public through a reverse merger with a shell company: archive.nytimes.com/dealbook.nytimes.com/2006/03/21/brother-of-google-co-founder-uses-shell-company-for-handheld-start-up/. "Handheld Entertainment" made an iPod competitor apparently. SEC filing: www.sec.gov/Archives/edgar/data/1309710/000095013606009480/file1.htm.
September 27, 2023 marked Google's 25 th aniversary and the page cirosantilli.com/carl-victor-page-jr had a small surge of views according to Google Analytics. On that day, this page was one of the top Google search results for "Carl Victor Page, Jr."[ref]. Wikipedia also had a large bump in searches for "Larry Page" on the same day: pageviews.wmcloud.org/?project=en.wikipedia.org&platform=all-access&agent=user&redirects=0&start=2023-09-11&end=2023-10-01&pages=Cat|Dog|Larry_Page which must be the root cause, Larry actually managed to beat "Cat" and "Dog" on that day.
SQL prefix column names with the table they came from by Ciro Santilli 35 Updated +Created
It is mind blowing that this is not possible... the only way to avoid ambiguity in JOINs with column name conflicts is to give aliases to each column...
Upsert by Ciro Santilli 35 Updated +Created
UPSERT is extremely handy, and reduces the number of find, check on server, update loops. But RETURNING is a fundamental part of that (to get the updated/existing) ID. Can't believe SQL hasn't standardized it yet as of 2022. But both SQLite and Postgres support it with similar syntax thankfully.
Inside Job (2010) by Ciro Santilli 35 Updated +Created
STT_FILE by Ciro Santilli 35 Updated +Created
Entry 1 has ELF64_R_TYPE == STT_FILE. ELF64_R_TYPE is continued inside of st_info.
Byte analysis:
  • 10 8: st_name = 01000000 = character 1 in the .strtab, which until the following \0 makes hello_world.asm
    This piece of information file may be used by the linker to decide on which segment sections go: e.g. in ld linker script we write:
    segment_name :
    {
        file(section)
    }
    to pick a section from a given file.
    Most of the time however, we will just dump all sections with a given name together with:
    segment_name :
    {
        *(section)
    }
  • 10 12: st_info = 04
    Bits 0-3 = ELF64_R_TYPE = Type = 4 = STT_FILE: the main purpose of this entry is to use st_name to indicate the name of the file which generated this object file.
    Bits 4-7 = ELF64_ST_BIND = Binding = 0 = STB_LOCAL. Required value for STT_FILE.
  • 10 13: st_shndx = Symbol Table Section header Index = f1ff = SHN_ABS. Required for STT_FILE.
  • 20 0: st_value = 8x 00: required for value for STT_FILE
  • 20 8: st_size = 8x 00: no allocated size
Now from the readelf, we interpret the others quickly.
SHT_NULL by Ciro Santilli 35 Updated +Created
In index 0, SHT_NULL is mandatory. Are there any other uses for it: stackoverflow.com/questions/26812142/what-is-the-use-of-the-sht-null-section-in-elf ?
Moon by Ciro Santilli 35 Updated +Created
Pluto by Ciro Santilli 35 Updated +Created
Nelson-Mandela.jpg by Ciro Santilli 35 Updated +Created
Figure 1.
Nelson-Mandela.jpg
. Source. Message:
"There is nothing like returning to a place that remains unchanged to find the ways in which you yourself have altered." - Nelson Mandela Nelson Rolihlahla Mandela was a South African anti-apartheid revolutionary, politician and philanthropist who served as President of South Africa from 1994 to 1999. - Wikipedia Born: July 18, 1918, Mvezo, South Africa Died: December 5, 2013.
Octet rule by Ciro Santilli 35 Updated +Created
p-orbital by Ciro Santilli 35 Updated +Created
Madelung energy ordering rule by Ciro Santilli 35 Updated +Created
Looking at the energy level of the Schrödinger equation solution for the hydrogen atom, you would guess that for multi-electron atoms that only the principal quantum number would matter, azimuthal quantum number getting filled randomly.
However, orbitals energies for large atoms don't increase in energy like those of hydrogen due to electron-electron interactions.
In particular, the following would not be naively expected:
  • 2s fills up before 2p. From the hydrogen solution, you might guess that they would randomly go into either one as they'd have the same energy
  • in potassium fills up before 3d, even though it has a higher principal quantum number!
This rule is only an approximation, there exist exceptions to the Madelung energy ordering rule.
ARM Cortex-M0+ by Ciro Santilli 35 Updated +Created
Classification of 2-transitive groups by Ciro Santilli 35 Updated +Created
Invalidating TLB entries by Ciro Santilli 35 Updated +Created
When the process changes, cr3 change to point to the page table of the new current process.
This creates a problem: the TLB is now filled with a bunch of cached entries for the old process.
A simple and naive solution would be to completely invalidate the TLB whenever the cr3 changes.
However, this is would not be very efficient, because it often happens that we switch back to process 1 before process 2 has completely used up the entire TLB cache entries.
Basically, the OS assigns a different ASID for each process, and then TLB entries are automatically also tagged with that ASID. This way when the process makes an access, the TLB can determine if a hit is actually for the current process, or if it is an old address coincidence with another process.
The x86 also offers the invlpg instruction which explicitly invalidates a single TLB entry. Other architectures offer even more instructions to invalidated TLB entries, such as invalidating all entries on a given range.
Single level paging scheme visualization by Ciro Santilli 35 Updated +Created
This is how the memory could look like in a single level paging scheme:
Links   Data                    Physical address

      +-----------------------+ 2^32 - 1
      |                       |
      .                       .
      |                       |
      +-----------------------+ page0 + 4k
      | data of page 0        |
+---->+-----------------------+ page0
|     |                       |
|     .                       .
|     |                       |
|     +-----------------------+ pageN + 4k
|     | data of page N        |
|  +->+-----------------------+ pageN
|  |  |                       |
|  |  .                       .
|  |  |                       |
|  |  +-----------------------+ CR3 + 2^20 * 4
|  +--| entry[2^20-1] = pageN |
|     +-----------------------+ CR3 + 2^20 - 1 * 4
|     |                       |
|     .    many entires       .
|     |                       |
|     +-----------------------+ CR3 + 2 * 4
|  +--| entry[1] = page1      |
|  |  +-----------------------+ CR3 + 1 * 4
+-----| entry[0] = page0      |
   |  +-----------------------+ <--- CR3
   |  |                       |
   |  .                       .
   |  |                       |
   |  +-----------------------+ page1 + 4k
   |  | data of page 1        |
   +->+-----------------------+ page1
      |                       |
      .                       .
      |                       |
      +-----------------------+  0
Notice that:
  • the CR3 register points to the first entry of the page table
  • the page table is just a large array with 2^20 page table entries
  • each entry is 4 bytes big, so the array takes up 4 MiB
  • each page table contains the physical address a page
  • each page is a 4 KiB aligned 4KiB chunk of memory that user processes may use
  • we have 2^20 table entries. Since each page is 4KiB == 2^12, this covers the whole 4GiB (2^32) of 32-bit memory
Page table entries by Ciro Santilli 35 Updated +Created
The exact format of table entries is fixed _by the hardware_.
Each page entry can be seen as a struct with many fields.
The page table is then an array of struct.
On this simplified example, the page table entries contain only two fields:
bits   function
-----  -----------------------------------------
20     physical address of the start of the page
1      present flag
so in this example the hardware designers could have chosen the size of the page table to b 21 instead of 32 as we've used so far.
All real page table entries have other fields, notably fields to set pages to read-only for Copy-on-write. This will be explained elsewhere.
It would be impractical to align things at 21 bits since memory is addressable by bytes and not bits. Therefore, even in only 21 bits are needed in this case, hardware designers would probably choose 32 to make access faster, and just reserve bits the remaining bits for later usage. The actual value on x86 is 32 bits.
Here is a screenshot from the Intel manual image "Formats of CR3 and Paging-Structure Entries with 32-Bit Paging" showing the structure of a page table in all its glory: Figure 1. "x86 page entry format".
Figure 1.
x86 page entry format
.
The fields are explained in the manual just after.

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