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Marc Verdiell Updated 2025-09-11
Marc Verdiell is a French electrical engineer born in 1963 or 1964[ref] and best known for being the creator and host of the CuriousMarc YouTube channel where he does mind blowing repairs and reverse engineering of vintage computers and other electronic equipment.
Marc sold his company LightLogic, an optoelectronics company he founded, to Intel in April 2001. This was just after the dot-com crash, but Intel apparently still correctly believed that the networking and the Internet would continue to grow and was investing in the area. His associate Frank Shum sued claiming he should be credited for some of the inventions sold but lost and Marc got it all.[ref][ref][ref]. Marc was then almost immediately appointed an Intel fellow at the extremelly early age of 37, and then stayed for a few years at Intel until 2006 according to his LinkedIn.[ref][ref]
Marc Verdiell at the Computer History Museum
. Source. Location inferred from Marc's videos, but likely, he often frequents the place, and it looks a bit like that.Marc's full name is actualy Jean-Marc Verdiell, but Ciro Santilli remembers there was one YouTube video where he mentions he gave up on "Jean" partly because anglophones would murder its pronounciation all the time.
Marc's PhD thesis is listed at: theses.fr/1990PA112048 and it is entitled:which is translated into English as:but the full text is not available online.
Phase locking of semiconductor laser arrays
Profile of Marc Verdiell by Gizmodo (2018)
Source. And a person who makes open educational content like Marc, truly deserves it.
Atherton managed to keep the entire place green and every house has a pool. Wikipedia comments web.archive.org/web/20220906010554/https://www.forbes.com/home-improvement/features/most-expensive-zip-codes-us/:
Atherton is known for its wealth; in 1990 and 2019, Atherton was ranked as having the highest per capita income among U.S. towns with a population between 2,500 and 9,999, and it is regularly ranked as the most expensive ZIP Code in the United States [(94027)]. The town has very restricting zoning, only permitting one single-family home per acre and no sidewalks. The inhabitants have strongly opposed proposals to permit more housing construction and Forbes confirms it for 2022: web.archive.org/web/20220906010554/https://www.forbes.com/home-improvement/features/most-expensive-zip-codes-us/, by far on top.
Marc has reached out to us and requested that some personal information be removed from this article, to which we complied.
Competitive programming Updated 2025-07-16
Magarena Updated 2025-07-16
Ciro Santilli wonders how legal it is. They very explicitly do not mention the words Magic: The Gathering anywhere.
No online play.
x86 Paging Tutorial Single level paging scheme numerical translation example Updated 2025-07-16
Suppose that the OS has setup the following page tables for process 1:and for process 2:
entry index entry address page address present
----------- ------------------ ------------ -------
0 CR3_1 + 0 * 4 0x00001 1
1 CR3_1 + 1 * 4 0x00000 1
2 CR3_1 + 2 * 4 0x00003 1
3 CR3_1 + 3 * 4 0
...
2^20-1 CR3_1 + 2^20-1 * 4 0x00005 1
entry index entry address page address present
----------- ----------------- ------------ -------
0 CR3_2 + 0 * 4 0x0000A 1
1 CR3_2 + 1 * 4 0x12345 1
2 CR3_2 + 2 * 4 0
3 CR3_2 + 3 * 4 0x00003 1
...
2^20-1 CR3_2 + 2^20-1 * 4 0xFFFFF 1
When process 1 tries to access a linear address, this is the physical addresses that will be actually accessed:
linear physical
--------- ---------
00000 001 00001 001
00000 002 00001 002
00000 003 00001 003
00000 FFF 00001 FFF
00001 000 00000 000
00001 001 00000 001
00001 FFF 00000 FFF
00002 000 00003 000
FFFFF 000 00005 000
To switch to process 2, the OS simply sets
cr3
to CR3_2
, and now the following translations would happen:linear physical
--------- ---------
00000 002 0000A 002
00000 003 0000A 003
00000 FFF 0000A FFF
00001 000 12345 000
00001 001 12345 001
00001 FFF 12345 FFF
00004 000 00003 000
FFFFF 000 FFFFF 000
Step-by-step translation for process 1 of logical address
0x00000001
to physical address 0x00001001
:- split the linear address into two parts:
| page (20 bits) | offset (12 bits) |
- look into Page table 1 because
cr3
points to it. - The hardware knows that this entry is located at RAM address
CR3 + 0x00000 * 4 = CR3
:
*0x00000
because the page part of the logical address is0x00000
*4
because that is the fixed size in bytes of every page table entry - since it is present, the access is valid
- by the page table, the location of page number
0x00000
is at0x00001 * 4K = 0x00001000
. - to find the final physical address we just need to add the offset:
00001 000 + 00000 001 --------- 00001 001
because00001
is the physical address of the page looked up on the table and001
is the offset.The offset is always simply added the physical address of the page. - the hardware then gets the memory at that physical location and puts it in a register.
Another example: for logical address
0x00001001
:- the page part is
00001
, and the offset part is001
- the hardware knows that its page table entry is located at RAM address:
CR3 + 1 * 4
(1
because of the page part), and that is where it will look for it - it finds the page address
0x00000
there - so the final address is
0x00000 * 4k + 0x001 = 0x00000001
x86 Paging Tutorial Single level paging scheme visualization Updated 2025-07-16
This is how the memory could look like in a single level paging scheme:
Links Data Physical address
+-----------------------+ 2^32 - 1
| |
. .
| |
+-----------------------+ page0 + 4k
| data of page 0 |
+---->+-----------------------+ page0
| | |
| . .
| | |
| +-----------------------+ pageN + 4k
| | data of page N |
| +->+-----------------------+ pageN
| | | |
| | . .
| | | |
| | +-----------------------+ CR3 + 2^20 * 4
| +--| entry[2^20-1] = pageN |
| +-----------------------+ CR3 + 2^20 - 1 * 4
| | |
| . many entires .
| | |
| +-----------------------+ CR3 + 2 * 4
| +--| entry[1] = page1 |
| | +-----------------------+ CR3 + 1 * 4
+-----| entry[0] = page0 |
| +-----------------------+ <--- CR3
| | |
| . .
| | |
| +-----------------------+ page1 + 4k
| | data of page 1 |
+->+-----------------------+ page1
| |
. .
| |
+-----------------------+ 0
Notice that:
- the CR3 register points to the first entry of the page table
- the page table is just a large array with 2^20 page table entries
- each entry is 4 bytes big, so the array takes up 4 MiB
- each page table contains the physical address a page
- each page is a 4 KiB aligned 4 KiB chunk of memory that user processes may use
- we have 2^20 table entries. Since each page is 4 KiB == 2^12, this covers the whole 4 GiB (2^32) of 32-bit memory
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The Translation Lookahead Buffer (TLB) is a cache for paging addresses.
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Master's degree Updated 2025-07-16
In your normal 2020 broken educational system, it is the first time at which students get an official chance to learn something advanced, and possibly prepare to go venture into the PhD desert.
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Xah Lee Updated 2025-07-16
fuseki.net/home/List-of-Patreon-Subs-with-Justification.html describes him well:
Homepage xahlee.org/ says:Nice Second brain vibe.
Let's see:
- LinkedIn: www.linkedin.com/in/xahlee/
- youtu.be/a6J62TwOreY?t=271 OMG he also uses a Kinesis Advantage 2 keyboard-like keyboard! Maybe there is something here after all.
- he's also a mad tutorial writer: xahlee.info/Wallpaper_dir/c4_Derivation.html#gc2.2.2.1 like Ciro's Stack Overflow
- www.patreon.com/xahlee £835.2/month from ony 27 members as of 2023, holy crap not bad!
- he was in a bad spot as of 2014: xahlee.info/emacs/misc/xah_as_good_as_dead.htmlThread: www.reddit.com/r/programming/comments/25pypq/im_about_as_good_as_dead_the_end_of_xah_lee/One is reminded of Chill and eat your bread in peace and Quote "Omar Khayyam's chill out quote". xahlee.org/PageTwo_dir/Personal_dir/xah.html autobiography is also of interest.
XML Updated 2025-07-16
Do you know what is worse than XML? Pseudo XML: stackoverflow.com/questions/5558502/is-html5-valid-xml/39560454#39560454
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