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Expect appreciable but nonuniform sidewall coverage, rounded upper edges and possible narrowing near the opening mouth. In sputtering, gas collisions and the extended source distribute arriving material over a broader range of directions than simple high-vacuum evaporation. At the specified pressure, the extent of that redistribution also depends on source-to-substrate distance and particle energies; pressure alone does not determine a unique sidewall thickness.

The top surfaces receive the nominal film. Oblique rays coat accessible walls, while the tall opening shadows some directions from its lower portions. Growth at the mouth can further shadow the floor or form an overhang. The sidewall film is therefore neither guaranteed zero nor guaranteed as thick as the horizontal film. This step coverage is generally unfavorable for clean lift-off process if it connects the film on the resist to the film on the substrate.

Normal evaporative deposition gives approximately horizontal films on the resist tops and exposed substrate, with little coating of vertical walls. A small distant electron-beam-heated source in high vacuum gives nearly line-of-sight arrival. Near-normal rays reach the opening floor, while vertical walls present almost no projected area.

The floor film and top film can remain disconnected, which helps a later lift-off process. A finite source size, tilted incidence, scattering or sample rotation changes that idealization and may coat one wall or shadow part of the floor. The stated $200\mathrm{nm}$ thickness is well below the $1\mu \mathrm{m}$ resist height, but this alone does not guarantee a clean break at every real edge.

A compatible, reaction-limited chemical vapor deposition process can give nearly conformal coverage of tops, sidewalls and floor. Gas-phase precursors reach recessed surfaces and react there; the coating is not restricted to the line of sight of a solid source. The result is a continuous film over the resist pattern, which is unfavorable for ordinary lift-off process.

If each wall receives the same $0.20\mu \mathrm{m}$ coating as a horizontal surface, the nominal $0.50\mu \mathrm{m}$ gap narrows toThat numerical result is the conformal idealization. Precursor depletion or rapid surface reaction can instead give poorer bottom coverage or premature closure near the mouth. Actual silver chemistry and deposition temperature must also be compatible with the resist; a process that decomposes the resist does not preserve the illustrated mask.

Locate an isolated nanowire first, then align source, drain, dielectric and top-gate patterns to it. A suitable research-device sequence is the following; the semiconductor is unspecified, so contact-barrier and surface-cleaning details cannot be assumed universally ohmic.

Prepare a clean electrically insulating substrate, with alignment marks. Disperse a sparse population of nanowires from the suspension, remove the carrier solvent compatibly, and locate a suitable isolated wire by microscopy. Record its position relative to the marks.

Use aligned electron beam lithography and a suitable lift-off process to open contact regions near the two ends while leaving a central channel. Clean the exposed contact regions without destroying the wire, evaporate gold and lift off. The contacts overlap the ends but do not bridge the central channel; test their electrical behavior before assuming an ohmic response.

In a second aligned pattern, define a central dielectric patch that extends beyond the proposed gate edges. Evaporate the specified silicon monoxide and lift off using a profile that permits film separation. Verify coverage over the wire and absence of pinholes: directional deposition onto curved nanoscale geometry is not automatically conformal.

Define and evaporate a gold top gate over that insulated central patch, with its lead kept electrically separated from the source, drain and wire. Lift off and test gate leakage before extracting transistor characteristics. The dielectric must remain continuous under the gate and overlap its edges; the illustrated central gate is not a third direct metal contact to the semiconductor. Gold and silicon monoxide are used as stipulated, without silently replacing SiO by a different oxide.

One workable route uses two resist coatings and a metal-defined optical aperture. The following are eleven fabrication operations; exposure/development is grouped as one lithographic operation, and rear metallization includes its contact activation if required. Detailed cleaning, rinsing and inspection occur between compatible operations.

1. Spin-coat a first photoresist on the front surface to define a mesa mask.
2. Expose and develop that mask, retaining resist over the complete active-cell mesa, including its future front contacts.
3. Etch the exposed semiconductor through the p-type layers and slightly into the n-type base. This removes the unwanted junction around the cell and produces the lateral mesa step.
4. Strip the first photoresist, leaving a clean mesa with its cap intact.
5. Spin-coat a second photoresist suitable for the lift-off process.
6. Expose and develop openings at the intended front grid or contact pads, positioned safely inside the mesa edge.
7. Evaporate a p-contact metal stack onto the exposed gallium arsenide and resist. Au/Zn-based contact metallization is a conventional candidate, subject to doping and contact-resistance qualification.
8. Dissolve the second photoresist to lift off unwanted metal, leaving the front contacts on the cap.
9. Selectively remove the cap from the light-receiving aperture, using the front metal as a hard mask and the aluminium gallium arsenide window as the etch stop.
10. Deposit the rear n-contact metallization, for example a qualified AuGe/Ni/Au system, with an appropriate contact-activation anneal if required and compatible with the front contact.
11. Deposit an antireflection dielectric over the optical aperture through a mechanical shadow mask that keeps the contact pads accessible. Its refractive index and thickness are chosen for the target optical band.

The essential material changes are junction isolation at the mesa edge, metal retained on the front cap, cap removed only from the optical aperture, and a conducting rear contact. The metal systems and anneal are a process design, not compositions specified by the drawing. A workable design must also qualify the passivation of etched sidewalls and the front-contact surface preparation.

Use optical photolithography for the two masks and a resist profile compatible with the selected process. A controlled wet mesa etch or a calibrated reactive-ion etching process must pass completely through the p–n interface, with limited sidewall damage. Use profilometry or cross-section controls to verify depth and a test device to check leakage. For the front lift-off process, directional evaporation and an undercut resist profile discourage a continuous metal fence bridging the mask sidewall.

The cap-removal step requires a separately qualified selective etchant: its selectivity between gallium arsenide and the particular aluminium gallium arsenide alloy depends on alloy composition, chemistry and processing conditions. Establish etch rate and endpoint on a witness stack; a universal etch time cannot be inferred from a diagram without thicknesses. The front metal must resist that etchant. Back metallization and activation must establish an ohmic contact rather than an unintended rectifying junction. Verify specific contact resistance on test structures and avoid an anneal that degrades the p–n profile. The final dielectric can be deposited by a low-damage evaporation or other compatible thin-film method.

Mesa definition comes first so that the two front contacts can be aligned to an already isolated active area and can avoid damaged mesa edges. Keeping the cap until after metallization provides the intended contact surface and protects the window during the contact process. lift-off process must precede selective cap removal if the retained metal is to act as that etch mask. The cap etch must stop above the emitter rather than destroy the junction.

Rear metallization after the wet-processing stages avoids unnecessarily exposing the rear contact to their etchants. Contact activation precedes the optical coating where possible, because the anneal can alter dielectric properties and optical thickness. The antireflection coating goes last and leaves the pads uncoated for electrical access. The key ordering constraints are clean semiconductor before contacts, electrical isolation without severing the intended current path, selective aperture opening, and a thermal budget compatible with every retained layer. If a different metal or etchant requires a changed order, it must preserve these same functions.

A modulation-doped GaAs-AlGaAs electron gas is confined on the GaAs side of the interface. The larger-gap AlGaAs supplies a conduction-band barrier; charge transfer from remote donors and the resulting electric field bend the bands into an approximately triangular well. transverse electronic mode wavefunctions are confined normal to the interface but free in its plane. electrons settle into the well until their electrochemical potential agrees with the donor/contact environment. An undoped spacer separates mobile electrons from ionized donors, reducing impurity scattering. Equilibrium has one Fermi level across the structure; the conduction-band edge is not flat. Surface depletion and the cap also affect the profile. The original drawing illustrates one occupied confinement transverse electronic mode; a single spatial electron gas need not in general imply only one occupied vertical transverse electronic mode.

molecular beam epitaxy can grow a clean GaAs buffer/channel, an undoped AlGaAs spacer, a Si-doped AlGaAs supply region and a protective GaAs cap on a suitable substrate. Control composition, interface quality and background impurities during growth; placing dopants directly in the channel defeats the principal mobility advantage. Define a mesa or isolation region, fabricate low-resistance ohmic contacts to the buried gas, and pattern fine metal split gates by electron beam lithography and the lift-off process. Negative gate bias depletes the underlying gas, leaving a narrow channel between the gates. Check contact resistance, leakage, carrier density and mobility; operation with ballistic electron transport requires channel length shorter than the relevant scattering lengths and smooth confinement on the wavelength scale. The lithographic gap does not equal the electrical width because of lateral depletion.

For a long uniform channel supporting ballistic electron transport, transverse confinement creates thresholds $E_n$ with continuous longitudinal propagation above each threshold. One directed spin branch of a transverse electronic mode has states per length $dk/(2\pi )$ and group velocity $v={\hslash }^{-1}dE/dk$. Hence $vdk/(2\pi )=dE/h$: velocity cancels the one-dimensional density of states. Including two unresolved spin states,For low temperature and small bias, a fully open transverse electronic mode has $T_n(E_F)=1$, givingThe assumptions are ideal reservoirs/contacts, negligible reflection and interactions that would invalidate the independent-subband description, and unresolved spin splitting. A resolved spin branch contributes $e^2/h$. The finite two-terminal electrical resistance is a contact/mode-injection effect, despite the absence of dissipative scattering inside the ideal channel.

For voltage partition in a ballistic constriction, a short saddle has strong local electric-field and electrostatic screening variation near its entrances and barrier, rather than the uniform Ohmic voltage gradient of a diffusive wire. Right-moving incident states inherit the source distribution and left-moving states the drain distribution; there is no unique local equilibrium chemical potential inside an ideal ballistic saddle. The electrostatic potential must be determined self-consistently. In a symmetric rigid-barrier approximation, the barrier follows the mean lead potential and half the electrochemical bias lies on each side. This is a stated approximation, not a universal spatial voltage profile.

For a saddle $U=U_0-m^{\ast }{\omega }_x^2{x}^2/2+m^{\ast }{\omega }_y^2{y}^2/2$, transverse electronic mode thresholds are $E_n=U_0+\hslash {\omega }_y(n+1/2)$. The smooth-barrier transmission is $T_n(E)=[1+\exp (-2\pi (E-E_n)/(\hslash {\omega }_x)){]}^{-1}$, approaching a step for a sharp threshold on the bias/thermal scale.^[ref]

Let ${\mu }_{S,D}=E_F\pm eV/2$ and assume no additional bias dependence of $T_n$. At zero temperature,When the source and drain sample $N+1$ and $N$ thresholds, the differential electrical conductance is $(N+1/2)2e^2/h$. These half plateaus arise from the two ends of the bias window, not fractional carriers. The dc ratio $I/V$ need not share their plateau values. Heating, spin splitting and interaction-induced features must be distinguished experimentally.

In bias spectroscopy of one-dimensional subbands, plot differential electrical conductance or its gate derivative against gate bias and source-drain bias. Threshold branches occur where $E_n(V_g)={\mu }_S$ or ${\mu }_D$. When one bias-window edge meets $E_n$ and the other $E_{n+1}$,Thus the intersections of adjacent threshold branches calibrate the one-dimensional spacing directly in energy. A gate lever arm $\alpha =-e^{-1}\partial E_n/\partial V_g$ can then convert gate intervals to energy; it should be measured rather than guessed. Asymmetric bias partition, a moving barrier or a gate-dependent spacing modifies slopes and plateau weights, requiring the corresponding self-consistent bias model.