Verilator interactive example Updated 2025-07-16
The example under verilog/interactive showcases how to create a simple interactive visual Verilog example using Verilator and SDL.
https://raw.githubusercontent.com/cirosantilli/media/master/verilog-interactive.gif
You could e.g. expand such an example to create a simple (or complex) video game for example if you were insane enough. But please don't waste your time doing that, Ciro Santilli begs you.
Usage: install dependencies:
sudo apt install libsdl2-dev verilator
then run as either:
make run RUN=and2
make run RUN=move
Tested on Verilator 4.038, Ubuntu 22.04.
In those examples, the more interesting application specific logic is delegated to Verilog (e.g.: move game character on map), while boring timing and display matters can be handled by SDL and C++.
Video game console Updated 2025-07-16
Who needs a hackable general purpose computer, when you can buy a completely locked down computer that only runs useless programs for which you have to pay thousands of dollars to develop for, cannot run a large percentage of major titles from competitor hardware due to business deals (see also) and will inevitably reach planned obsolescence in 4 years?
Webdev's Creed Updated 2025-07-16
This is my stack. There are many like it, but this one is mine.
My stack is my best friend. It is my life. I must master it as I must master my life.
Without me, my stack is useless. Without my stack, I am useless. I must fire my requests true. I must shoot straighter than my hackers who are trying to kill me. I must shoot him before he shoots me. I will ...
My stack is human, even as I am human, because it is my life. Thus, I will learn it as a brother. I will learn its weaknesses, its strength, its parts, its accessories, its ORMs and its asset bundlers. I will keep my stack clean and ready, even as I am clean and ready. We will become part of each other. We will ...
Before God, I swear this creed. My stack and I are the defenders of my website. We are the masters of our enemy. We are the saviors of my life.
So be it, until victory is mine and there is no enemy, but peace!
Explanation: this is an allusion to the Rifleman's Creed. This particular version talks about the website stack chosen for a website, i.e. the libraries used.
Ciro Santilli has always felt that choosing a stack is an almost religious choice. It is perhaps part of why the prayer style of the original Rifleman's Creed resonates with the web stack choice.
It is very hard to know how things are going go, the ups and downs, before putting big hours into it.
And once you start, it is hard, though not impossible, to move away.
The same allusion would make sense with any complex library choice, but it is particularly apparent in web development since there are so many different web stacks to choose from. A bit like rifles, they are all somewhat fungible, though of course not as much.
webpack Updated 2025-07-16
Webpack is like a magic hydra that can eat any type of file and bundle it into a single output: .js, .ts, .ccs, .scss, .jsx, .tsx, require, import, import css from .js, it doesn't matter at all, it just digests all into the same dump.
When it works, you are just left in awe and with a single Js file. When it doesn't, you're fucked and have to debug for several hours.
Demos under: webpack/. To run all of them by default:
cd webpack/min
npm install
npm run build
xdg-open index.html
To easily make changes and reload the .js output live let this run on a terminal:
npx webpack watch
Examples:
Website Updated 2025-07-16
TODO find/create decent answer.
I think the best answer is something along:
A basic non-precise intuition is that a good model of reality is that electrons do not "interact with one another directly via the electromagnetic field".
A better model happens to be the quantum field theory view that the electromagnetic field interacts with the photon field but not directly with itself, and then the photon field interacts with parts of the electromagnetic field further away.
The more precise statement is that the photon field is a gauge field of the electromagnetic force under local U(1) symmetry, which is described by a Lie group. TODO understand.
This idea was first applied in general relativity, where Einstein understood that the "force of gravity" can be understood just in terms of symmetry and curvature of space. This was later applied o quantum electrodynamics and the entire Standard Model.
Bibliography:
This was one of the only bad experience Ciro had at Polytechnique, besides the inevitable fear of not graduating.
But the head of the applied mathematics department Polytechnique prevented him from going because Ciro didn't have the necessary grades, even though the Germans had already agreed to it: he had a C, but he needed a B. As mentioned at École Polytechnique, most Brazilians had crappy grades due to their Polytechnique-incompatible background.
This was done because in the past students with bad grades had abandoned their internships halfway and given foreigners a bad impression of Polytechnique.
It is impossible to say if the head of department really agreed with this bullshit policy, or if it was something beyond his powers and he hid his true opinion, but it felt like the agreed.
What an extremely limited view!!!
To leave the worse, the worse. To assume that grades mean anything!
And thus Ciro had to choose a last moment internship that he hated, rather than becoming the greatest roboticist that ever lived, and did terribly at it.
At least on the other hand Ciro learnt Python instead of working at the internship, and became the greatest programming tutorial writer that ever lived. Maybe.
Whole cell simulation Updated 2025-07-16
Ciro Santilli started taking some notes at: github.com/cirosantilli/awesome-whole-cell-simulation. but they are going to be all migrated here.
It is interesting to note how one talks about single cell analysis, in contrast to whole cell simulation: experimentally it is hard to analyse a single cell. But theoretically, it is hard to simulate a single cell. This mismatch is perhaps the ultimate frontier of molecular biology.
Video 1.
A Computational Whole-Cell Model Predicts Genotype From Phenotype by Markus Covert (2013)
Source.
You could put an LED in a cavity with a thin long hole but then, most rays, which are not aligned with the hole, will just bounce inside forever producing heat.
So you would have a very hot device, and very little efficiency on the light output. This heat might also behave like a black-body radiation source, so you would not have a single frequency.
The beauty of lasers is the laser cavity (two parallel mirrors around the medium) selects parallel motion preferentially, see e.g.: youtu.be/_JOchLyNO_w?t=832 from Video "How Lasers Work by Scientized (2017)"
I also believe in publishing null results, so here goes.
Thick cardboard paper and Gorilla Tape: the intense Sun heat made the cardboard bend, and even the Gorilla tape could not hold it, leading to light leakage. Even worse, it started to smell a bit, and I got afraid that it could catch fire, so don't do this! Maybe I will try coating with aluminium foil next time, but I'm afraid it might stick to the glass. In any case, even if those setups work, your room may be permanently very dark depending on how far the window opens, which can lead to other problems such as mold. Another downside of this method is that the tape is extremely sticky, and especially difficult to remove if it touches the glass, where you can't use metallic items to scrape it off without scratching the glass. I had to get a solvent and use a lot of elbow grease to get rid of it.
I have tried a few sleeping masks, but none of them were enough on their own. There is always some light leakage around the nose, especially as you turn around in the night. And some of them are too hot. I have tried:
I also considered getting one of those "Perfect Fit Blinds" www.blindsdirect.co.uk/perfect-fit-roller-blinds (archive) which fit between the glass and the insulation. This looks like it could work. But I didn't go for it in the end because my window has 3 glass panels, so I would have to get three of those blinds separately.
x86 custom instructions Updated 2025-07-16
Intel is known to have created customized chips for very large clients.
This is mentioned e.g. at: www.theregister.com/2021/03/23/google_to_build_server_socs/
Intel is known to do custom-ish cuts of Xeons for big customers.
Those chips are then used only in large scale server deployments of those very large clients. Google is one of them most likely, given their penchant for Google custom hardware.
TODO better sources.
x86 Paging Tutorial Updated 2025-07-19
This tutorial explains the very basics of how paging works, with focus on x86, although most high level concepts will also apply to other instruction set architectures, e.g. ARM.
The goals are to:
  • demonstrate minimal concrete simplified paging examples that will be useful to those learning paging for the first time
  • explain the motivation behind paging
This tutorial was extracted and expanded from this Stack Overflow answer.
64 bits is still too much address for current RAM sizes, so most architectures will use less bits.
x86_64 uses 48 bits (256 TiB), and legacy mode's PAE already allows 52-bit addresses (4 PiB). 56-bits is a likely future candidate.
12 of those 48 bits are already reserved for the offset, which leaves 36 bits.
If a 2 level approach is taken, the best split would be two 18 bit levels.
But that would mean that the page directory would have 2^18 = 256K entries, which would take too much RAM: close to a single-level paging for 32 bit architectures!
Therefore, 64 bit architectures create even further page levels, commonly 3 or 4.
x86_64 uses 4 levels in a 9 | 9 | 9 | 9 scheme, so that the upper level only takes up only 2^9 higher level entries.
The 48 bits are split equally into two disjoint parts:
----------------- FFFFFFFF FFFFFFFF
Top half
----------------- FFFF8000 00000000


Not addressable


----------------- 00007FFF FFFFFFFF
Bottom half
----------------- 00000000 00000000
A 5-level scheme is emerging in 2016: software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf which allows 52-bit addresses with 4k pagetables.
Page directory given to process by the OS:
entry index   entry address      page table address  present
-----------   ----------------   ------------------  --------
0             CR3 + 0      * 4   0x10000             1
1             CR3 + 1      * 4                       0
2             CR3 + 2      * 4   0x80000             1
3             CR3 + 3      * 4                       0
...
2^10-1        CR3 + 2^10-1 * 4                       0
Page tables given to process by the OS at PT1 = 0x10000000 (0x10000 * 4K):
entry index   entry address      page address  present
-----------   ----------------   ------------  -------
0             PT1 + 0      * 4   0x00001       1
1             PT1 + 1      * 4                 0
2             PT1 + 2      * 4   0x0000D       1
...                                  ...
2^10-1        PT1 + 2^10-1 * 4   0x00005       1
Page tables given to process by the OS at PT2 = 0x80000000 (0x80000 * 4K):
entry index   entry address     page address  present
-----------   ---------------   ------------  ------------
0             PT2 + 0     * 4   0x0000A       1
1             PT2 + 1     * 4   0x0000C       1
2             PT2 + 2     * 4                 0
...
2^10-1        PT2 + 0x3FF * 4   0x00003       1
where PT1 and PT2: initial position of page table 1 and page table 2 for process 1 on RAM.
With that setup, the following translations would happen:
linear    10 10 12 split  physical
--------  --------------  ----------
00000001  000 000 001     00001001
00001001  000 001 001     page fault
003FF001  000 3FF 001     00005001
00400000  001 000 000     page fault
00800001  002 000 001     0000A001
00801004  002 001 004     0000C004
00802004  002 002 004     page fault
00B00001  003 000 000     page fault
Let's translate the linear address 0x00801004 step by step:
  • In binary the linear address is:
    0    0    8    0    1    0    0    4
    0000 0000 1000 0000 0001 0000 0000 0100
  • Grouping as 10 | 10 | 12 gives:
    0000000010 0000000001 000000000100
    0x2        0x1        0x4
    which gives:
    page directory entry = 0x2
    page table     entry = 0x1
    offset               = 0x4
    So the hardware looks for entry 2 of the page directory.
  • The page directory table says that the page table is located at 0x80000 * 4K = 0x80000000. This is the first RAM access of the process.
    Since the page table entry is 0x1, the hardware looks at entry 1 of the page table at 0x80000000, which tells it that the physical page is located at address 0x0000C * 4K = 0x0000C000. This is the second RAM access of the process.
  • Finally, the paging hardware adds the offset, and the final address is 0x0000C004.
Page faults occur if either a page directory entry or a page table entry is not present.
The Intel manual gives a picture of this translation process in the image "Linear-Address Translation to a 4-KByte Page using 32-Bit Paging": Figure 1. "x86 page translation process"
Figure 1.
x86 page translation process
.
x86 Paging Tutorial / Application Updated 2025-07-16
Paging makes it easier to compile and run two programs or threads at the same time on a single computer.
For example, when you compile two programs, the compiler does not know if they are going to be running at the same time or not.
So nothing prevents it from using the same RAM address, say, 0x1234, to store a global variable.
And thread stacks, that must be contiguous and keep growing down until they overwrite each other, are an even bigger issue!
But if two programs use the same address and run at the same time, this is obviously going to break them!
Paging solves this problem beautifully by adding one degree of indirection:
(logical) ------------> (physical)
             paging
Where:
  • logical addresses are what userland programs see, e.g. the contents of rsi in mov eax, [rsi].
    They are often called "virtual" addresses as well.
  • physical addresses can be though of the values that go to physical RAM index wires.
    But keep in mind that this is not 100% true because of further indirections such as:
Compilers don't need to worry about other programs: they just use simple logical addresses.
As far as programs are concerned, they think they can use any address between 0 and 4 GiB (2^32, FFFFFFFF) on 32-bit systems.
The OS then sets up paging so that identical logical addresses will go into different physical addresses and not overwrite each other.
This makes it much simpler to compile programs and run them at the same time.
Paging achieves that goal, and in addition:
  • the switch between programs is very fast, because it is implemented by hardware
  • the memory of both programs can grow and shrink as needed without too much fragmentation
  • one program can never access the memory of another program, even if it wanted to.
    This is good both for security, and to prevent bugs in one program from crashing other programs.
Or if you like non-funny jokes:
Figure 1.
Comparison between the Linux kernel userland memory virtualization and The Matrix
. Source. Is this RAM real?

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