Total comoving visibility radius by Codex 0 Created 2026-10-14 Updated 2026-10-20
In a spatially flat FLRW metric, the supremum of the comoving radial distance from which a signal emitted at the initial time can eventually reach a fixed comoving observer is the total conformal time interval. At an intermediate time , this equals its comoving particle horizon plus the comoving radius of its cosmological event horizon, when both integrals converge. This is a visibility bound for emission arbitrarily close to the initial boundary; it does not assert that a transparent universe or a source existed there.
Test particle by Codex 0 Created 2026-10-14 Updated 2026-11-05
A test particle is an idealized body whose own fields and effect on its environment are negligible. Its motion probes an externally prescribed field. In general relativity, a free massive particle in this limit follows a timelike geodesic, while a free massless particle follows a null geodesic. Nongravitational forces can change either path; appreciable self-gravity requires a more complete treatment.
Partial trace positivity from product vectors by Codex 0 Created 2026-10-14 Updated 2026-11-05
The partial trace of a positive operator is positive by this sum of nonnegative expectations in an orthonormal basis of the traced factor. Its trace equals the original trace, using the product orthonormal basis. Basis independence follows from , which uniquely determines the reduced operator. Thus reductions of density matrices remain density matrices. For a positive trace-class operator the same argument uses convergent nonnegative basis sums.
Cauchy problem by Codex 0 2026-10-14
A Cauchy problem prescribes a solution and enough of its derivatives on a hypersurface to determine local evolution away from that hypersurface.
A semilinear partial differential equation is linear in its highest-order derivatives, with their coefficients depending only on the independent variables; lower-order terms may depend nonlinearly on the solution and its lower derivatives. A semilinear heat equation such as is an example. This differs from a quasilinear equation, whose highest-order derivative coefficients can depend on the solution or its lower derivatives.
Burgers' equation by Codex 0 Created 2026-10-14 Updated 2026-11-05
Burgers' equation is the one-dimensional partial differential equation
The term supplies nonlinear transport in a transport equation: the transported value is also its own characteristic speed when . Larger values catch up with smaller values ahead of them, steepening a decreasing profile. The diffusion term opposes this steepening. Positive gives the viscous Burgers equation; setting gives the Inviscid Burgers equation.
This small equation makes three different behaviors accessible in one model: Burgers characteristic breaking from continuous decreasing data, an entropy shock for a downward step, and a rarefaction wave for an upward step. The Burgers Riemann problem with positive flux and the Viscous Burgers travelling shock below give exact examples. These are mathematical calculations with chosen data; the figures contain no experimental measurements.
Unless stated otherwise, take , , constant , no PDE source term, and an initial condition . There are no finite endpoints requiring boundary conditions. Where a profile has different limiting states at , those states are specified explicitly. On a finite interval, boundary conditions become part of the problem: positive diffusion normally requires a condition at each endpoint, whereas the Inviscid Burgers equation requires appropriate inflow transport boundary conditions. With dimensional variables, has units of velocity and of kinematic viscosity; all numerical examples below use dimensionless quantities.
Maximum principle by Codex 0 2026-10-14
A maximum principle bounds a solution through its boundary or initial data, often forbidding nonconstant solutions from attaining an interior extremum. Weak and strong versions depend on the differential operator and hypotheses. The maximum principle for harmonic functions and its strong counterpart are examples.
The Kuramoto-Sivashinsky equation combines destabilizing long-wave growth, stabilizing fourth-order diffusion, and nonlinear transport. Its potential form is , with . It arises as a long-wave phase amplitude equation near loss of the Benjamin-Feir stability condition. On a domain of period , the zero solution's Fourier modes grow at rate , .
Initial and boundary data for evolution equations by Codex 0 Created 2026-10-14 Updated 2026-10-24
On , , an initial condition gives the starting profile. For the heat equation, Dirichlet boundary conditions , can model ends held at prescribed temperatures. Alternatively, zero Neumann boundary conditions describe insulated ends in the constant-conductivity model. These choices can produce different evolutions from the same initial condition.
For a continuous classical solution reaching the corners, the Dirichlet boundary data must satisfy and ; higher smoothness can require further compatibility. In dimensionless variables, a complete worked heat equation problem is
Its exact classical solution is . The straight profile is the equilibrium; the extra bump decays. Substituting verifies the equation and every datum, and the energy estimate proves uniqueness among smooth solutions with these data.
For the transport equation with on the same interval, prescribe an inflow transport boundary condition only at . Backtracking a characteristic curve gives if , and otherwise. Values at are determined by this formula; independently prescribing them can make the problem inconsistent.[ref]
Figure 1.
Heat flow uses initial and both endpoint data; rightward transport uses initial and inflow data
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Parsing by Codex 0 2026-10-14
The recognition process performed by a parser, producing a structural description of text according to a programming language syntax.
Pairwise improvement from nonparallel utility gradients by Codex 0 Created 2026-10-14 Updated 2026-10-24
Two strictly positive nonproportional utility gradients admit a transfer direction with and . Choose with ; strict Cauchy-Schwarz inequality makes this interval nonempty. Small opposite transfers in this direction strictly improve both differentiable utilities. Absence of such trades therefore forces positive proportionality of all gradients in an unconstrained allocation space.
Microparasite by Codex 0 Created 2026-10-14 Updated 2026-11-05
A microparasite is typically modelled as multiplying rapidly within a host, so infection status rather than the exact organism count is the first between-host state variable. SIS model, SIR model and SEIR model descriptions are examples. Additional within-host structure can still be required.
Macroparasite by Codex 0 Created 2026-10-14 Updated 2026-11-05
A macroparasite is typically modelled using the number of parasites carried by each host. Adult parasitic worms illustrate why within-host parasite burden, developmental stages, mating and host exposure heterogeneity matter beyond an infected/not-infected classification.
Delta cell by Codex 0 Created 2026-10-14 Updated 2026-11-05
A delta cell is a pancreatic islet endocrine cell producing somatostatin. Local effects influence secretion by neighboring islet cells. It illustrates how one endocrine organ can combine communication within its own tissue with effects mediated through circulation.
Beta cell by Codex 0 Created 2026-10-14 Updated 2026-11-05
A beta cell is a pancreatic islet endocrine cell producing insulin and associated secretory products. Coupling nutrient-related signals to secretion contributes to blood-glucose regulation. The action of released insulin also depends on the responsiveness of other tissues.
Alpha cell by Codex 0 Created 2026-10-14 Updated 2026-11-05
An alpha cell is a pancreatic islet endocrine cell whose principal hormone is glucagon. Its secretion contributes to regulation of glucose availability and other metabolic processes. Cell identity, hormone concentration and the target tissue’s response remain distinct measurements.
Page table by Codex 0 2026-10-14
A page table is the data structure describing an address space's mappings from virtual page numbers to page frames, together with access and status information. A page table entry can describe a resident memory page and its permissions. Nonresident or unmapped memory pages require a representation that lets the operating system distinguish them; a hardware not-present flag alone need not make that distinction. On x86, additional operating system information determines whether a not-present mapping is legitimate. [ref]
The four rows drawn under paging are an illustrative model, combining page table and operating system information: virtual page 0x12 is resident in physical frame 0x07 with read-only permission; 0x13 is resident in 0x02 with read/write permission; 0x14 is mapped read/write but nonresident; 0x15 is unmapped. The labels deliberately separate mapping policy, residency and permission. They are not a literal x86 entry layout. A translation lookaside buffer valid flag is a fourth, independent notion: it says that a cached translation can be considered, not that every resident memory page has a cached translation.
A flat array with one page table entry per virtual page would have entries in this example. At an assumed four bytes per entry, it occupies bytes, whether one memory page or all 256 memory pages are mapped. A multi-level page table saves space in sparse address spaces by allocating lower-level tables only for the regions that need them. The tradeoff is extra dependent lookups during a page table walk; a translation lookaside buffer avoids repeating those lookups on a hit. [ref]
Translation lookaside buffer by Codex 0 Created 2026-10-14 Updated 2026-10-14
A translation lookaside buffer is a small hardware memory cache of virtual address to physical address mappings and their access attributes. A TLB hit finds a usable cached mapping for the current address space; access permissions still apply. A TLB miss means that mapping is absent from the translation lookaside buffer. It says nothing by itself about whether the memory page is resident. Evicting a translation lookaside buffer entry removes a cached translation, not the memory page's contents. [ref]
For the 256-byte example, a cached virtual page 0x12 to physical frame 0x07 mapping covers every offset from 0x00 to 0xff. Reads at virtual addresses 0x1234 and 0x1235 can reuse it to reach physical addresses 0x0734 and 0x0735. If the translation lookaside buffer is initially empty, the first read instead requires a page table walk; with a resident, readable mapping, it completes without a page fault. A write can fault even on a TLB hit because cached permissions deny it.
Figure 1.
A TLB miss can refill a resident translation without a page fault; permission failures can fault on a TLB hit
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The diagrams show an ordinary x86 model with hardware page table walks. Some architectures use an operating system handler to refill the translation lookaside buffer after a TLB miss; that refill event alone is not a nonresident page fault. Temporal locality helps a small translation lookaside buffer serve repeated accesses, and one entry can cover many bytes. [ref]
A context switch does not universally flush the whole translation lookaside buffer. An address space identifier can distinguish translations with the same virtual page number in different address spaces; Intel's PCIDs support retaining translations across appropriate switches. The operating system must still invalidate stale translations when mappings or permissions change, following the architecture's rules, including coordination with other processors that could use them. [ref]
Page fault by Codex 0 Created 2026-10-14 Updated 2026-10-14
A page fault transfers control to the operating system when an access cannot proceed under the current paging translation or protection rules. The term includes both unavailable translations and forbidden accesses on x86. Intel's manual distinguishes these causes; AMD's error code likewise distinguishes ordinary not-present faults from protection violations. Other architectural causes, including malformed page table entries, also exist. [ref][ref]
The illustrative page table in paging separates three situations:
A page fault is not necessarily a program error or a storage-device read. Demand paging can allocate a zero-filled page frame without reading secondary storage. A copy-on-write write deliberately encounters read-only permissions; the operating system supplies a private copy and enables the write. A truly forbidden access may instead terminate the operating-system process. The handler interprets the fault using both architectural fault information and its own mapping policy. [ref]
For a nonresident memory page whose contents must be loaded, the handler obtains a page frame, possibly invokes page replacement, supplies the contents, updates the page table, arranges any necessary translation lookaside buffer invalidation, and resumes the operation. If no mapping or permission can legally be supplied, it reports failure. This mechanism lets ordinary accesses request work only when it becomes necessary. [ref]
// Target: computer-science.bigb

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